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Publication numberUSD352009 S
Publication typeGrant
Application numberUS 07/572,376
Publication dateNov 1, 1994
Filing dateAug 27, 1990
Publication number07572376, 572376, US D352009 S, US D352009S, US-S-D352009, USD352009 S, USD352009S
InventorsKenneth D. Elkins
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Circuit analyzer
US D352009 S
Images(4)
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Claims(1)
  1. The ornamental design for a circuit analyzer, as shown and described.
Description

FIG. 1 is a perspective view of the circuit analyzer embodying the design of the present invention;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a rear elevational view thereof;

FIG. 4 is a side elevational view thereof;

FIG. 5 is a side elevational view thereof; and,

FIG. 6 is a top plan view thereof, the bottom being unadorned and shaped as indicated in FIGS. 1-5.

Classifications
U.S. ClassificationD10/75, D10/78