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Publication numberUSD401252 S
Publication typeGrant
Application numberUS 29/082,647
Publication dateNov 17, 1998
Filing dateJan 27, 1998
Publication number082647, 29082647, US D401252 S, US D401252S, US-S-D401252, USD401252 S, USD401252S
InventorsAndrew William Tudhope, David Bruce Jordan, Jose Luis Gonzalez
Original AssigneeSemiconductor Equipment Technology
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Shield and cover for target of sputter coating apparatus
US D401252 S
Abstract  available in
Images(4)
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Claims(1)
  1. The ornamental design for a shield and cover for target of sputter coating apparatus, as shown and described.
Description

FIG. 1 is a perspective view of a shield and cover for target of sputter coating apparatus embodying the design of the invention;

FIG. 2 is a top plan view of the shield and cover for target of sputter coating apparatus of FIG. 1;

FIG. 3 is a bottom plan view of the shield and cover for target of sputter coating apparatus of FIG. 1;

FIG. 4 is a side elevation view of the shield and cover for target of sputter coating apparatus as seen from the bottom of FIG. 2;

FIG. 5 is a side elevation view of the shield and cover for target of sputter coating apparatus as seen from the top of FIG. 2;

FIG. 6 is a side elevation view of the shield and cover for target of sputter coating apparatus as seen from the left side of FIG. 2;

FIG. 7 is a side elevation view of the shield and cover for target of sputter coating apparatus as seen from the right side of FIG. 2; and,

FIG. 8 is a cross-sectional view of the shield and cover for target of sputter coating apparatus taken along the line 8--8 of FIG. 2.

Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US7097744Jun 12, 2003Aug 29, 2006Applied Materials, Inc.Method and apparatus for controlling darkspace gap in a chamber
US7772860Jul 17, 2008Aug 10, 2010Nanonexus, Inc.Massively parallel interface for electronic circuit
US7872482Sep 19, 2007Jan 18, 2011Verigy (Singapore) Pte. LtdHigh density interconnect system having rapid fabrication cycle
US7884634Jan 15, 2009Feb 8, 2011Verigy (Singapore) Pte, LtdHigh density interconnect system having rapid fabrication cycle
US7952373 *Oct 23, 2006May 31, 2011Verigy (Singapore) Pte. Ltd.Construction structures and manufacturing processes for integrated circuit wafer probe card assemblies
US20040251130 *Jun 12, 2003Dec 16, 2004Applied Materials, Inc.Method and apparatus for controlling darkspace gap in a chamber
Classifications
U.S. ClassificationD15/138