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Publication numberUSD401567 S
Publication typeGrant
Application numberUS 29/070,005
Publication dateNov 24, 1998
Filing dateApr 25, 1997
Publication number070005, 29070005, US D401567 S, US D401567S, US-S-D401567, USD401567 S, USD401567S
InventorsWarren M. Farnworth, Alan G. Wood, David R. Hembree, Salman Akram
Original AssigneeMicron Technology, Inc.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Temporary package for semiconductor dice
US D401567 S
Images(2)
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Claims(1)
  1. The ornamental design for a temporary package for testing semiconductor dice, as shown and described.
Description

FIG. 1 is an enlarged top perspective view of a temporary package for semiconductor dice showing my new design;

FIG. 2 is a left side elevational view thereof;

FIG. 3 is a right side elevational view thereof;

FIG. 4 is a top plan view thereof;

FIG. 5 is a front side elevational view thereof;

FIG. 6 is a bottom plan view thereof; and,

FIG. 7 is a rear side elevation view thereof.

Non-Patent Citations
Reference
1Van Zant, Peter, Microchip Fabrication--A Practical Guide To Semiconductor Processing, Second Edition, 1990, pg. 493.
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US6222379Jun 8, 1998Apr 24, 2001Micron Technology, Inc.Conventionally sized temporary package for testing semiconductor dice
US6242931Jan 8, 2001Jun 5, 2001Micron Technology, Inc.Flexible semiconductor interconnect fabricated by backside thinning
US6255840May 4, 1999Jul 3, 2001Micron Technology, Inc.Semiconductor package with wire bond protective member
US6263566May 3, 1999Jul 24, 2001Micron Technology, Inc.Flexible semiconductor interconnect fabricated by backslide thinning
US6300782Jun 4, 2001Oct 9, 2001Micron Technology, Inc.System for testing semiconductor components having flexible interconnect
Classifications
U.S. ClassificationD13/182