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Publication numberUSD401912 S
Publication typeGrant
Application numberUS 29/055,038
Publication dateDec 1, 1998
Filing dateMay 28, 1996
Priority dateNov 27, 1995
Publication number055038, 29055038, US D401912 S, US D401912S, US-S-D401912, USD401912 S, USD401912S
InventorsGorab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji
Original AssigneeMitsubishi Denki Kabushiki Kaisha
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Semiconductor device
US D401912 S
Images(2)
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Claims(1)
  1. The ornamental design for a semiconductor device, as shown and described.
Description

FIG. 1 is a top, front and right side perspective view of semiconductor device showing our new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a top plan view thereof;

FIG. 4 is a bottom plan view thereof;

FIG. 5 is a rear elevational view thereof; and,

FIG. 6 is a right side view thereo, the left side being a mirror image of the side shown.

Non-Patent Citations
Reference
1Mitsubishi '85 M53200P Series, 1985.
2Toshiba GTR Module 1989, p. 26.
Classifications
U.S. ClassificationD13/182