US D416236 S
FIG. 1 is a front elevational view of an integrated circuit package showing our new design;
FIG. 2 is a top plan view thereof;
FIG. 3 is a bottom plan view thereof;
FIG. 4 is a right elevational view thereof, the left side being the same in appearance as the right side;
FIG. 5 is a top, front, right perspective view thereof; and,
FIG. 6 is a bottom, rear, right perspective view thereof.