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Publication numberUSD457146 S1
Publication typeGrant
Application numberUS 29/142,483
Publication dateMay 14, 2002
Filing dateMay 29, 2001
Priority dateNov 29, 2000
Publication number142483, 29142483, US D457146 S1, US D457146S1, US-S1-D457146, USD457146 S1, USD457146S1
InventorsKazuhiro Yamamoto, Tadaharu Hashiguchi
Original AssigneeKabushiki Kaisha Toshiba
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Substrate for a semiconductor element
US D457146 S1
Abstract  available in
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  1. The ornamental design for a substrate for a semiconductor element, as shown and described.

FIG. 1 is a right side elevational view of a substrate for a semiconductor element, showing our new design; the opposite side being an identical image thereof;

FIG. 2 is a top plan view thereof; the opposite side being an identical image thereof;

FIG. 3 is a front elevational view thereof; and,

FIG. 4 is a rear elevational view thereof.

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USD738833 *Mar 7, 2013Sep 15, 2015QA Trading LLCCircuit board cufflink
U.S. ClassificationD13/182