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Publication numberUSD475028 S1
Publication typeGrant
Application numberUS 29/167,132
Publication dateMay 27, 2003
Filing dateSep 10, 2002
Priority dateMar 11, 2002
Publication number167132, 29167132, US D475028 S1, US D475028S1, US-S1-D475028, USD475028 S1, USD475028S1
InventorsTetsuji Hori, Takayuki Yoshihira, Yuuji Hiyama, Gentaro Ookura
Original AssigneeKabushiki Kaisha Toshiba
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Semiconductor device
US D475028 S1
Abstract  available in
Images(3)
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Claims(1)
  1. The ornamental design for a semiconductor device, as shown and described.
Description

FIG. 1 is a front perspective view of a semiconductor device, showing our new design;

FIG. 2 is a rear perspective view thereof;

FIG. 3 is a top plan view thereof; a bottom plan view being a mirror image thereof;

FIG. 4 is a right side elevational view thereof; a left side elevational view being a mirror image thereof;

FIG. 5 is a front elevational view thereof; and,

FIG. 6 is a rear elevational view thereof.

Non-Patent Citations
Reference
1Catalog of a Chip Size Package (VMN4).
2Extract of Nihon Kogyo Shimbun (Newspaper) showing a Chip-Type Transistor Package (E-CSP).
Referenced by
Citing PatentFiling datePublication dateApplicantTitle
USD769832 *Jul 24, 2013Oct 25, 2016Sony CorporationSemiconductor device
USD796459 *Sep 28, 2016Sep 5, 2017Rohm Co., Ltd.Packaged semiconductor circuit module
USRE45712 *Sep 18, 2014Oct 6, 2015Photonics Electronics Technology Research Association (PETRA)Signal conversion device
USRE45741 *Sep 18, 2014Oct 13, 2015Photonics Electronics Technology Research Association (PETRA)Signal conversion device
Classifications
U.S. ClassificationD13/182