US D510915 S1
Abstract available in
FIG. 1 is a top perspective view of an optoelectronic IC package of the present invention;
FIG. 2 is a first side view thereof;
FIG. 3 is a second side view thereof;
FIG. 4 is a third side view thereof;
FIG. 5 is a top view thereof; and,
FIG. 6 is a fourth side view thereof.
The ornamental design which is claimed is shown in solid lines in the drawings. Any broken lines in the drawings are for illustrative purposes only and form no part of the claimed design.