|Publication number||USD511331 S1|
|Application number||US 29/191,635|
|Publication date||Nov 8, 2005|
|Filing date||Oct 10, 2003|
|Priority date||Jul 9, 2003|
|Publication number||191635, 29191635, US D511331 S1, US D511331S1, US-S1-D511331, USD511331 S1, USD511331S1|
|Inventors||Shogo Horinouchi, Hideki Ohyama|
|Original Assignee||Matsushita Electric Industrial Co., Ltd.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Referenced by (2), Classifications (1) |
|External Links: USPTO, USPTO Assignment, Espacenet|
Optoelectronic IC package
US D511331 S1
We claim the ornamental design for an optoelectronic IC package, as shown and described.
FIG. 1 is a top perspective view of an optoelectronic IC package of the present invention;
FIG. 2 is a first side view thereof;
FIG. 3 is a second side view thereof;
FIG. 4 is a third side view thereof;
FIG. 5 is a top view thereof; and,
FIG. 6 is a fourth side view thereof.
The ornamental design which is claimed is shown in solid lines in the drawings. Any broken lines in the drawings are for illustrative purposes only and form no part of the claimed design.
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