|Publication number||USD523403 S1|
|Application number||US 29/217,556|
|Publication date||Jun 20, 2006|
|Filing date||Nov 19, 2004|
|Priority date||Sep 9, 2004|
|Publication number||217556, 29217556, US D523403 S1, US D523403S1, US-S1-D523403, USD523403 S1, USD523403S1|
|Original Assignee||Kabushiki Kaisha Toshiba|
|Classifications (1) |
|External Links: USPTO, USPTO Assignment, Espacenet|
Substrate for a semiconductor device
US D523403 S1
The ornamental design for a substrate for a semiconductor device, as shown and described.
FIG. 1 is a top plan view of a substrate for a semiconductor device, showing my new design; the opposite side being a mirror image thereof;
FIG. 2 is a front elevational view thereof;
FIG. 3 is a right side elevational view thereof; the opposite side being a mirror image thereof; and,
FIG. 4 is a rear elevational view thereof.