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Publication numberUSD529000 S1
Publication typeGrant
Application numberUS 29/201,582
Publication dateSep 26, 2006
Filing dateMar 18, 2004
Priority dateSep 18, 2003
Publication number201582, 29201582, US D529000 S1, US D529000S1, US-S1-D529000, USD529000 S1, USD529000S1
InventorsHiroaki Ishii
Original AssigneeRiso Kagaku Corporation
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Integrated circuit tag
US D529000 S1
Images(4)
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Claims(1)
  1. The ornamental design for an integrated circuit tag, as shown and described.
Description

FIG. 1 is a front elevational view of and integrated circuit tag showing my new design;

FIG. 2 is a is top plan view thereof;

FIG. 3 is a left side elevational view thereof;

FIG. 4 is a right side elevational view thereof;

FIG. 5 is a rear elevational view thereof; and,

FIG. 6 is a bottom plan view thereof;

Classifications
U.S. ClassificationD13/182