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Publication numberUSD540272 S1
Publication typeGrant
Application numberUS 29/238,804
Publication dateApr 10, 2007
Filing dateSep 22, 2005
Priority dateApr 18, 2005
Fee statusLapsed
Publication number238804, 29238804, US D540272 S1, US D540272S1, US-S1-D540272, USD540272 S1, USD540272S1
InventorsKazuaki HIGASHIBATA
Original AssigneeMurata Manufacturing Co., Ltd.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Semiconductor module
US D540272 S1
Abstract  available in
Images(3)
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Claims(1)
  1. The ornamental design for a semiconductor module, as shown and described.
Description

FIG. 1 is a front view of a semiconductor module showing our new design;

FIG. 2 is a rear view thereof;

FIG. 3 is a top plan view thereof;

FIG. 4 is a bottom plan view thereof;

FIG. 5 is a left side view thereof; and,

FIG. 6 is a right side view thereof.

The broken lines shown in the drawings are for illustrative purposes only and form no part of the claimed design.

Classifications
U.S. ClassificationD13/182
Legal Events
DateCodeEventDescription
Dec 20, 2011FPExpired due to failure to pay maintenance fee
Effective date: 20111030
Oct 30, 2011LAPSLapse for failure to pay maintenance fees
Jun 6, 2011REMIMaintenance fee reminder mailed
Sep 30, 2005ASAssignment
Owner name: CALIFORNIA ENERGY & POWER, CALIFORNIA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KINKAID, CHRISTOPHER PIPER TOBY;COYE, PETER L.;REEL/FRAME:017048/0581
Effective date: 20050922