|Publication number||USD554084 S1|
|Application number||US 29/241,655|
|Publication date||Oct 30, 2007|
|Filing date||Oct 31, 2005|
|Priority date||Oct 31, 2005|
|Publication number||241655, 29241655, US D554084 S1, US D554084S1, US-S1-D554084, USD554084 S1, USD554084S1|
|Original Assignee||Kabushiki Kaisha Toshiba|
|Export Citation||BiBTeX, EndNote, RefMan|
|Referenced by (1), Classifications (1) |
|External Links: USPTO, USPTO Assignment, Espacenet|
Portion of a semiconductor apparatus mounting-position accuracy measurement jig
US D554084 S1
The ornamental design for a portion of a semiconductor apparatus mounting-position accuracy measurement jig, as shown and described.
FIG. 1 is a front, top and right side perspective view of a portion of a semiconductor apparatus mounting-position accuracy measurement jig, showing my new design;
FIG. 2 is a front elevational view thereof;
FIG. 3 is a rear elevational view thereof;
FIG. 4 Is a right side elevational view thereof;
FIG. 5 is a left side elevational view thereof;
FIG. 6 is a top plan view thereof; and,
FIG. 7 Is a bottom plan view thereof.
The broken lines are for illustrative purposes only and form no part of the claimed design.
|Citing Patent||Filing date||Publication date||Applicant||Title|
|USD761745 *||Dec 17, 2013||Jul 19, 2016||Sumitomo Electric Industries, Ltd.||Semiconductor device|