Search Images Maps Play YouTube News Gmail Drive More »
Sign in
Screen reader users: click this link for accessible mode. Accessible mode has the same essential features but works better with your reader.

Patents

  1. Advanced Patent Search
Publication numberUSD571810 S1
Publication typeGrant
Application numberUS 29/268,869
Publication dateJun 24, 2008
Filing dateNov 15, 2006
Priority dateJun 20, 2006
Publication number268869, 29268869, US D571810 S1, US D571810S1, US-S1-D571810, USD571810 S1, USD571810S1
InventorsHidetaka Ikeda
Original AssigneeKabushiki Kaisha Toshiba
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Module with built-in integrated circuits for use with IC cards
US D571810 S1
Images(4)
Previous page
Next page
Claims(1)
  1. We claim the ornamental design for a module with built-in integrated circuits for use with IC cards, as shown and described.
Description

FIG. 1 is a perspective view of a module with built-in integrated circuits for use with IC cards showing my new design,

FIG. 2 is a front elevational view thereof,

FIG. 3 is a rear elevational view thereof,

FIG. 4 is a left side elevational view thereof,

FIG. 5 is a right side elevational view thereof,

FIG. 6 is a top plan view thereof,

FIG. 7 is a bottom plan view thereof; and,

FIG. 8 is a reduced reference view showing the article in use thereof.

The portions shown in broken lines are for illustrative purposes only and form no part of the claimed design.

Classifications
U.S. ClassificationD14/437