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Publication numberUSD578536 S1
Publication typeGrant
Application numberUS 29/304,268
Publication dateOct 14, 2008
Filing dateFeb 27, 2008
Priority dateAug 27, 2007
Publication number29304268, 304268, US D578536 S1, US D578536S1, US-S1-D578536, USD578536 S1, USD578536S1
InventorsLeo Lei, Raymond Wang
Original AssigneePodium Photonics (Guangzhou) Ltd.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Chip
US D578536 S1
Images(6)
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Claims(1)
  1. The ornamental design for a chip, as shown and described.
Description

FIG. 1 is a perspective view of a new chip design;

FIG. 2 is a top plan view thereof;

FIG. 3 is a left side elevation view thereof;

FIG. 4 is a right side elevation view thereof;

FIG. 5 is a front elevational view thereof;

FIG. 6 is a rear elevational view thereof; and,

FIG. 7 is a bottom plan view thereof.

Classifications
U.S. ClassificationD14/435, D14/437, D13/180