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Publication numberUSD579019 S1
Publication typeGrant
Application numberUS 29/304,270
Publication dateOct 21, 2008
Filing dateFeb 27, 2008
Priority dateAug 27, 2007
Publication number29304270, 304270, US D579019 S1, US D579019S1, US-S1-D579019, USD579019 S1, USD579019S1
InventorsLeo Lei, Raymond Wang
Original AssigneePodium Photonics (Guangzhou) Ltd.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Chip
US D579019 S1
Abstract  available in
Images(4)
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Claims(1)
  1. The ornamental design for a chip, as shown and described.
Description

FIG. 1 is a perspective view of a new chip design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a top plan view thereof;

FIG. 4 is a rear elevational view thereof;

FIG. 5 is a left side elevation view thereof;

FIG. 6 is a right side elevation view thereof; and,

FIG. 7 is a bottom plan view thereof.

Referenced by
Citing PatentFiling datePublication dateApplicantTitle
USD743919Jul 17, 2014Nov 24, 2015Epistar CorporationLight-emitting diode
USD748592 *Mar 12, 2015Feb 2, 2016Epistar CorporationLight emitting diode device
USD750580 *Oct 30, 2014Mar 1, 2016Epistar CorporationLight-emitting diode array
USD760179Oct 22, 2014Jun 28, 2016Epistar CorporationLight-emitting diode device
USD773410 *Oct 24, 2014Dec 6, 2016Epistar CorporationLight-emitting diode array
USD775090 *Oct 23, 2015Dec 27, 2016Seoul Viosys Co., Ltd.Light emitting diode
Classifications
U.S. ClassificationD14/435, D13/180, D14/437