USD591924S1 - Arm for wafer transportation for manufacturing semiconductor wafers - Google Patents

Arm for wafer transportation for manufacturing semiconductor wafers Download PDF

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Publication number
USD591924S1
USD591924S1 US29/300,495 US30049508F USD591924S US D591924 S1 USD591924 S1 US D591924S1 US 30049508 F US30049508 F US 30049508F US D591924 S USD591924 S US D591924S
Authority
US
United States
Prior art keywords
arm
semiconductor wafers
manufacturing semiconductor
wafer transportation
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US29/300,495
Inventor
Takahiro Abe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Assigned to TOKYO ELECTRON LIMITED reassignment TOKYO ELECTRON LIMITED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ABE, TAKAHIRO
Application granted granted Critical
Publication of USD591924S1 publication Critical patent/USD591924S1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

FIG. 1 is a top view of the design for a arm for wafer transportation for manufacturing semiconductor wafers in accordance with the invention;
FIG. 2 is a bottom view thereof;
FIG. 3 is a right side view thereof;
FIG. 4 is a left side view thereof;
FIG. 5 is a front view thereof;
FIG. 6 is a rear view thereof;
FIG. 7 is a magnified, rear, sectional view between lines A—A′ of FIG. 2, along line D—D of FIG. 2; and,
FIG. 8 is a magnified, rear, sectional view between lines B—B′ of FIG. 2, along line D—D of FIG. 2.
The broken line showing in the figures is included for the purpose of illustrating environment and forms no part of the claimed design.

Claims (1)

  1. The ornamental design for an arm for wafer transportation for manufacturing semiconductor wafers, as shown and described.
US29/300,495 2007-10-03 2008-04-02 Arm for wafer transportation for manufacturing semiconductor wafers Expired - Lifetime USD591924S1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007026880 2007-10-03

Publications (1)

Publication Number Publication Date
USD591924S1 true USD591924S1 (en) 2009-05-05

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Family Applications (1)

Application Number Title Priority Date Filing Date
US29/300,495 Expired - Lifetime USD591924S1 (en) 2007-10-03 2008-04-02 Arm for wafer transportation for manufacturing semiconductor wafers

Country Status (1)

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US (1) USD591924S1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USD767233S1 (en) * 2012-08-30 2016-09-20 Entegris, Inc. Wafer carrier ring
USD767234S1 (en) * 2015-03-02 2016-09-20 Entegris, Inc. Wafer support ring

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USD767233S1 (en) * 2012-08-30 2016-09-20 Entegris, Inc. Wafer carrier ring
USD767234S1 (en) * 2015-03-02 2016-09-20 Entegris, Inc. Wafer support ring

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