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Publication numberUSD600659 S1
Publication typeGrant
Application numberUS 29/273,613
Publication dateSep 22, 2009
Filing dateMar 9, 2007
Priority dateSep 12, 2006
Publication number273613, 29273613, US D600659 S1, US D600659S1, US-S1-D600659, USD600659 S1, USD600659S1
InventorsHiroyuki Matsuura, Koichi Shimada
Original AssigneeTokyo Electron Limited
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Process tube for manufacturing semiconductor wafers
US D600659 S1
Images(12)
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Claims(1)
  1. The ornamental design for a process tub for manufacturing semiconductor wafers, as shown and described.
Description

FIG. 1 is a perspective view of the design for a process tube for manufacturing semiconductor wafers in accordance with the invention;

FIG. 2 is a front view thereof;

FIG. 3 is a rear view thereof;

FIG. 4 is a top view thereof;

FIG. 5 is a bottom view thereof;

FIG. 6 is a right side view thereof;

FIG. 7 is a left side view thereof;

FIG. 8 is a sectional view thereof along line 88 of FIG. 4;

FIG. 9 is a sectional view thereof along line 99 of FIG. 4;

FIG. 10 is a sectional view thereof along line 1010 of FIG. 4; and,

FIG. 11 is a sectional view thereof along line 1111 of FIG. 2.

The broken lines are shown for illustrative purpose only and form no part of the claimed design.

Classifications
U.S. ClassificationD13/182