|Publication number||USD601520 S1|
|Application number||US 29/232,144|
|Publication date||Oct 6, 2009|
|Filing date||Jun 15, 2005|
|Priority date||Jan 14, 2005|
|Publication number||232144, 29232144, US D601520 S1, US D601520S1, US-S1-D601520, USD601520 S1, USD601520S1|
|Inventors||Yasuo Yokota, Motonari Ogura, Masahiko Hirata|
|Original Assignee||Panasonic Corporation|
|Export Citation||BiBTeX, EndNote, RefMan|
|Classifications (1), Legal Events (3) |
|External Links: USPTO, USPTO Assignment, Espacenet|
Electric circuit board
US D601520 S1
We claim the ornamental design for an electric circuit board, as shown and described.
FIG. 1 is a top perspective view of an electric circuit board of the present invention; and,
FIG. 2 is a top view thereof.
The ornamental design which is claimed is shown in solid lines in the drawings. Any broken lines in the drawings are for illustrative purposes only and form no part of the claimed design.
|Oct 4, 2011||FP||Expired due to failure to pay maintenance fee|
Effective date: 20110814
|Aug 14, 2011||LAPS||Lapse for failure to pay maintenance fees|
|Mar 21, 2011||REMI||Maintenance fee reminder mailed|