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Publication numberUSD633452 S1
Publication typeGrant
Application numberUS 29/356,456
Publication dateMar 1, 2011
Priority dateAug 27, 2009
Publication number29356456, 356456, US D633452 S1, US D633452S1, US-S1-D633452, USD633452 S1, USD633452S1
InventorsKeisuke Namiki, Hozumi Yasuda, Osamu Nabeya, Makoto Fukushima, Shingo Togashi, Satoru Yamaki, Katsuhide Watanabe
Original AssigneeEbara Corporation
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Elastic membrane for semiconductor wafer polishing apparatus
US D633452 S1
Abstract  available in
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  1. The ornamental design for an elastic membrane for semiconductor wafer polishing apparatus, as shown and described.

FIG. 1 is a bottom view of an elastic membrane for semiconductor wafer polishing apparatus showing our new design;

FIG. 2 is a top view thereof;

FIG. 3 is a front view thereof;

FIG. 4 is a rear view thereof;

FIG. 5 is a right side view thereof;

FIG. 6 is a left side view thereof;

FIG. 7 is a perspective view, observed from below thereof,

FIG. 8 is a perspective view, observed from above thereof;

FIG. 9 is a cross-section view taken along the line 99 of FIG. 1 thereof; and,

FIG. 10 is a enlarged view of part 10 of FIG. 9 thereof.

Referenced by
Citing PatentFiling datePublication dateApplicantTitle
USD744967Aug 11, 2014Dec 8, 2015Veeco Instruments Inc.Spindle key
USD748591Jan 14, 2015Feb 2, 2016Veeco Instruments Inc.Keyed spindle
U.S. ClassificationD13/182