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Publication numberUSD637098 S1
Publication typeGrant
Application numberUS 29/360,394
Publication dateMay 3, 2011
Filing dateApr 26, 2010
Priority dateOct 30, 2009
Publication number29360394, 360394, US D637098 S1, US D637098S1, US-S1-D637098, USD637098 S1, USD637098S1
InventorsMitsuru Oonuma, Akira Omachi, Kazuhiko Nishiyama, Hiroyuki Suzuki, Yasuhiko Nara
Original AssigneeHitachi High-Technologies Corporation
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Semiconductor testing machine
US D637098 S1
Abstract  available in
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  1. The ornamental design for a semiconductor testing machine, as shown.

FIG. 1 is a front, top and right side perspective view of a semiconductor testing machine showing our new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a rear elevational view thereof;

FIG. 4 is a top plan view thereof;

FIG. 5 is a bottom plan view thereof;

FIG. 6 is a right side elevational view thereof; and,

FIG. 7 is a left side elevational view thereof.

U.S. ClassificationD10/75