FIG. 1 is a front, right, and top perspective view of a semiconductor substrate showing our new design;
FIG. 2 is a front view thereof, a rear view being a mirror image thereof;
FIG. 3 is a top plan view thereof;
FIG. 4 is a bottom plan view thereof;
FIG. 5 is a right-side view thereof, a left side view being a mirror image thereof;
FIG. 6 is a partially enlarged view at 6 shown in FIG. 2 thereof;
FIG. 7 is a partially enlarged view at 7 shown in FIG. 2 thereof;
FIG. 8 is an enlarged cross sectional view at 8-8 shown in FIG. 3 thereof; and,
FIG. 9 is a partially enlarged sectional view at 9 shown in FIG. 8 thereof.
The broken line showing of the semiconductor substrate is for the purpose of illustrating environmental structure and forms no part of the claimed design.