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Publication numberUSD653634 S1
Publication typeGrant
Application numberUS 29/390,541
Publication dateFeb 7, 2012
Priority dateOct 28, 2010
Publication number29390541, 390541, US D653634 S1, US D653634S1, US-S1-D653634, USD653634 S1, USD653634S1
InventorsShin Soyano
Original AssigneeFuji Electric Co., Ltd.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Semiconductor
US D653634 S1
Abstract  available in
Images(7)
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Claims(1)
  1. The ornamental design for a semiconductor, as shown and described.
Description

FIG. 1 is a perspective view of front, top plan and right side of a semiconductor showing our new design;

FIG. 2 is a front view thereof;

FIG. 3 is a rear view thereof;

FIG. 4 is a top plan view thereof;

FIG. 5 is a bottom view thereof;

FIG. 6 is a left side view thereof;

FIG. 7 is a right side view thereof; and,

FIG. 8 is a partial enlarged view at A-A′, B-B′ thereof.

The portions of the article in broken lines are shown for illustrative purposes only and form no part of the claimed design.

Referenced by
Citing PatentFiling datePublication dateApplicantTitle
USD731491 *Feb 7, 2014Jun 9, 2015NimbeLink L.L.C.Embedded cellular modem
USD748595 *Feb 3, 2015Feb 2, 2016Infineon Technologies AgPower semiconductor module
USD754084 *Nov 8, 2013Apr 19, 2016Mitsubishi Electric CorporationSemiconductor device
USD755741 *Feb 18, 2015May 10, 2016Semiconductor Components Industries, LlcPower device package
USD755742 *Feb 18, 2015May 10, 2016Semiconductor Components Industries, LlcPower device package
USD759604 *Jun 17, 2015Jun 21, 2016Mitsubishi Electric CorporationSemiconductor device
Classifications
U.S. ClassificationD13/182