|Publication number||USD654869 S1|
|Application number||US 29/390,194|
|Publication date||Feb 28, 2012|
|Filing date||Apr 21, 2011|
|Priority date||Oct 26, 2010|
|Publication number||29390194, 390194, US D654869 S1, US D654869S1, US-S1-D654869, USD654869 S1, USD654869S1|
|Original Assignee||Wuerth Elektronik Eisos Gmbh & Co. Kg|
|Export Citation||BiBTeX, EndNote, RefMan|
|Classifications (1) |
|External Links: USPTO, USPTO Assignment, Espacenet|
US D654869 S1
The ornamental design for an electronic component, as shown and described.
FIG. 1 is a top plan view of the electronic component;
FIG. 2 is a front elevation view thereof;
FIG. 3 is a rear elevation view thereof;
FIG. 4 is a bottom plan view thereof;
FIG. 5 is a side elevation view thereof (the opposite side being a mirror image);
FIG. 6 is a (front) side perspective view thereof; and,
FIG. 7 is a (rear) side perspective view thereof.
The broken lines shown represent unclaimed subject matter and form no part of the claimed design.