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Publication numberUSD654884 S1
Publication typeGrant
Application numberUS 29/389,562
Publication dateFeb 28, 2012
Filing dateApr 13, 2011
Priority dateOct 21, 2010
Publication number29389562, 389562, US D654884 S1, US D654884S1, US-S1-D654884, USD654884 S1, USD654884S1
InventorsManabu Honma, Katsuyuki Hishiya
Original AssigneeTokyo Electron Limited
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Top plate for reactor for manufacturing semiconductor
US D654884 S1
Abstract  available in
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  1. The ornamental design for top plate for reactor for manufacturing semiconductor, as shown and described.

FIG. 1 is front perspective view of a top plate for reactor for manufacturing semiconductor illustrating our new design;

FIG. 2 is a front view thereof;

FIG. 3 is a rear view thereof;

FIG. 4 is a right side view thereof;

FIG. 5 is a left side view thereof;

FIG. 6 is a top plan view thereof;

FIG. 7 is a bottom view thereof;

FIG. 8 is a reference front view indicating the plane upon which a sectional view is taken; and,

FIG. 9 is a sectional view taken along line 9-9-9 of FIG. 8.

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US9455138Nov 10, 2015Sep 27, 2016Asm Ip Holding B.V.Method for forming dielectric film in trenches by PEALD using H-containing gas
US9478415Feb 13, 2015Oct 25, 2016Asm Ip Holding B.V.Method for forming film having low resistance and shallow junction depth
US9543180Aug 1, 2014Jan 10, 2017Asm Ip Holding B.V.Apparatus and method for transporting wafers between wafer carrier and process tool under vacuum
US9556516Oct 9, 2013Jan 31, 2017ASM IP Holding B.VMethod for forming Ti-containing film by PEALD using TDMAT or TDEAT
USD753269 *Jan 9, 2015Apr 5, 2016Asm Ip Holding B.V.Top plate
USD766850 *Sep 12, 2014Sep 20, 2016Tokyo Electron LimitedWafer holder for manufacturing semiconductor
U.S. ClassificationD13/182