|Publication number||USH1773 H|
|Application number||US 09/034,950|
|Publication date||Jan 5, 1999|
|Filing date||Feb 10, 1998|
|Priority date||Feb 10, 1998|
|Publication number||034950, 09034950, US H1773 H, US H1773H, US-H-H1773, USH1773 H, USH1773H|
|Inventors||Theodore C. Cheston, H. Paris Coleman|
|Original Assignee||United States Of America|
|Export Citation||BiBTeX, EndNote, RefMan|
|Referenced by (17), Classifications (9), Legal Events (1)|
|External Links: USPTO, USPTO Assignment, Espacenet|
1. Field of the Invention
This invention deals with time-delay circuits utilized for beamforming in a phased array antenna system and more particularly to a phased array antenna system utilizing switched time-delay circuits to significantly reduce the complexity of time-delay beam steering.
2. Description of the Related Art
Basically, the phased-array antenna is composed of a group of individual radiators which are distributed and oriented in a linear or two-dimensional spatial configuration. The amplitude and phased excitations of each radiator can be individually controlled to form a radiated beam. The position of the beam in space is controlled electronically by adjusting the phase of the excitation signals at the individual radiators. Hence, beam scanning is accomplished with the antenna aperture remaining fixed in space without the involvement of mechanical motion in the scanning process. An electronically steered antenna array radar is able to track a large number of targets and illuminate some of these targets with radio-frequency energy. The antenna beamwidth may be changed electronically by means of phase spoiling to search certain areas more rapidly but with less gain. Frequency agility can be achieved through changing the frequency of transmission at will from pulse to pulse, but requires sequential phase adjustments since the beam pointing direction with phase control is narrow band and changes with frequency.
Phase change at the elements due to change in frequency is exploited in frequency scanned arrays, but with phased arrays it restricts the use of wide instantaneous bandwidth, which is needed to enhance radar capabilities and performance. The narrow bandwidth of phased arrays is due to phase being controlled for the antenna aperture excitation, and steered beams will scan towards broadside as the frequency is increased, and thus move off the target.
The object of this invention is to provide an ultra-wideband active electronically scanned antenna that utilizes compensating line lengths in cascade in an antenna branch feed line thereby providing a variable time-delay along the branch to each antenna element, thereby allowing smaller component structure than the prior art throughout the system.
The object of this invention is to enhance the performance of radar by allowing wide instantaneous bandwidth through the use of short time-delay circuitry.
Another object of this invention is to reduce the cost of radars by providing short time-delay circuits.
These and other objectives are obtained by utilizing an architecture utilizing simple, variable, and short time-delay circuits to significantly reduce the complexity of time-delay beam-steering. The architecture is substantially frequency independent and allows "shared apertures" concepts in both series and parallel (corporate) feed antenna arrays. The architecture may be applied to active "phased" arrays where any losses are made up by amplification on both transmit and receive.
FIG. 1 is a schematic of the architecture for an ultra-wideband beam forming line source with a series feed having adjustable time delay modules having an odd number of antenna elements.
FIG. 1a is a schematic of the architecture for an ultra-wideband beam forming line source with a series feed having adjustable time delay modules having an even number of antenna elements.
FIG. 1b is a schematic of an adjustable time-delay module utilizing solid state components.
FIG. 1c is a schematic of a transmit/receive module.
FIG. 2 is a schematic of the architecture for an ultra-wideband beam forming line-source having adjustable time-delay modules with two-way amplification in the branch lines at one or more locations.
FIG. 3 is a schematic of a series feed combiner network utilizing subarrays and having adjustable time-delays.
FIG. 4 is a schematic of an ultra-wideband corporate feed architecture having adjustable time-delays.
FIG. 5 is a plot of the figure of merit (FOM) versus the number of elements (N) of an ultra-wideband linear array.
In the preferred embodiment 10, shown in FIG. 1, ultra-wideband beamforming with a series feed in its simplest form is shown that is comprised of a plurality of time delay circuits 18 having a means for switching in time delays from 0 to 2d/c, where d is the inter-element spacing and c is the velocity of light. At the highest frequency the elements are spaced by λ/2 to avoid grating lobes and the delay corresponds to 360° of phaseshift, as with a normal phaseshifter.
In the series feed, an electromagnetic signal is coupled at uniform intervals along branch lines 24, 26, and 28 to antenna feed line 33 to radiating elements, 12 that are equally spaced along the aperture. For frequency independent steering of the beam, the electrical pathlengths from the electromagnetic signal source 14 to each radiating element 12 to the desired equiphasefront 16 must be the same. This is accomplished by the insertion of an adjustable time-delay circuit 18 into the antenna feed line 33 prior to each element 12.
An electromagnetic signal generated by an electromagnetic signal source 14, such as a radar or microwave transmitter, passes through a signal splitter 22 which divides the electromagnetic signal into a plurality of electromagnetic signals which are applied to the antenna elements 12 through a plurality of signal branches 24, 26, and 28. For an antenna array having an odd number of branches, at minimum there are three branches, a center or central branch 24, a right branch, and a left branch, 26 and 28, respectively. The center, or central, branch 24 is without variable time-delay 18, having only a bias delay 32 of a preselected amount. Its feed length is the same as that of the other branches 26 and 28 with delay adjusted to d/c. Dependent upon the operational frequency and power of the system, these branches 24, 26, and 28 and element feedlines 33 may be either waveguides, coaxial cable, or microstrip.
The time-delay circuits 18 are reciprocal so that one setting applies equally for transmitting and receiving. When the time-delays 18 are set half way, i.e., to d/c, then the various lines 33 feeding the radiating elements 12 at the aperture have bias delays 32 of predetermined amounts making them all equal; that setting will therefore give a broadside beam, independent of the frequency. The bias delay 32 is about a/2c at the center of the array, where a is the aperture size, and reduces to zero at the edge.
To scan the beam, each one of the time-delay circuits 18 in the branch 26 is ideally set to the same value (d/c)+(d/c) sin Θ1, where Θ1 is the scan angle, and similarly, all the time delay circuits 18 in branch 28 elements are set to (d/c)-(d/c) Sin Θ1, all independent of frequency. This gives both frequency independent scanning and also makes for a very simple scanning calculation with only two drivers necessary if they can handle the power. Under the above conditions, the smallest change in beampointing direction is obtained by changing each one of the switchable time-delays 18 by the smallest bit. With N radiating elements 12 and n bits of time-delay 18, the minimal change in beampointing direction is N/2n scanned beamwidths at the highest frequency. For example, when N=64 and n=6, the minimal step change in beam position is one beamwidth.
Branch time delays 18 may be set individually and thereby forego the granular rough-plus-fine steering method discussed above. Each of the branch time-delays 18 is set to give the closest correct value for that station, as can be achieved with the available number of bits. The most central branch 24 delay circuit 32 is set first, followed sequentially by the more outward circuits, taking into account all previous delay contributions as well as correction data from previous calibration.
Switchable time-delay 18 of 0 to 2d/c, with d=λ/2 at the highest frequency, gives some excess in available delay, since this value allows scanning to ±90°. Holding scanning to, for example, ±60° requires only sin 60°=0.866 times that delay. Additional excess time-delay, if needed, for example, for the correction of construction errors, can be obtained by increasing the time-delay circuit 18 range from a maximum of 2d/c to perhaps 2.2d/c.
For an antenna array having an even number of elements, there are two branches 24a and 24b in the center of the array, as shown in FIG. 1a, one on each side of the center line and spaced d/2 from the center line. The switchable time delays 18a and 18b for those two branches 24a and 24b, respectively, would have to be one half of that of the other time-delay circuits 18, i.e., 1/2 d/c±1/2 d/c sin Θ0. The time-delays at the antennas 12 associated with these branches 24a and 24b, with bias 32, and a time-delay setting of 1/4 d/c time-delay circuits 18a and 18b is the same as that of the other elements with their delay adjusted to d/c.
The insertion loss for the time delay circuits 18 is expressed in dB and is approximately proportional to the number of bits used. The total loss at the end-element is ##EQU1## where N/2 is the number of radiating elements 12 fed by one branch 24, 26, and 28 (the aperture has N or N+1 elements where N is an even number), n is the number of bits in each switchable branch time-delay circuit 18, and LB is the loss per bit in dB. With practical losses per bit and the large number of bits required for low sidelobes, this loss quickly becomes prohibitive for large antennas. For example, if it is assumed a loss per bit of LB =0.2 dB, n=6, and N=64, then the maximum insertion loss at the edge element is L=38.4 dB. This is not acceptable, even in view of a desirable receiver illumination edge taper.
A significant reduction in insertion loss may be obtained by adding solid-state amplifier modules 36, FIG. 1c, to each branch 26, and 28, as in the series feed embodiment depicted in 40, FIG. 2. Fine steering (and correction for construction errorsd) could be accomplished by the addition of an additional switched time-delay circuit 18 at each module 36. The design and construction of the solid-state amplifier module 36 is well known to those skilled in the art.
Also, the insertion loss may be reduced by dividing the arrays 12 in the form of the preferred embodiment as shown in FIG. 1 into subarrays 54, as shown in FIG. 3. These subarrays 54 are then combined by a further, similar, series feed combiner network 50. This method will give frequency independent beam steering but at the cost of an increase in the number of time-delay circuits 18. The total insertion loss to the last antenna element 12 in this case is ##EQU2## where M is the number of subarrays, NS is the number of elements per subarray, nC is the number of bits in the combining branch delay, n is the number of bits in the subarray delay, and LB is the loss per bit in dB. This gives an improvement factor to the loss in dB of ##EQU3## where N=NS ×M. Using the above example of N=64, but with M=8 subarrays, each with NS =8 elements, and with n=6 and nC =9 (maximum time-delay increased from (2d/c) to (8×2d/c)), this subarray architecture gives an improvement factor L/L.sub.τ =3.2 or a total insertion loss of 12 dB, which generally is considered acceptable in such cases.
Another preferred embodiment, shown in FIG. 4, is an active corporate, or parallel, feed architecture 60 with switchable time-delay-line circuits 18. In a parallel feed the electromagnetic energy is fed in parallel to a set of delay lines i.e., 18, each time-delay-line circuit 18 being systematically shorter than the prior one in electrical path to the array 12. In comparison with the series architecture, shown above in FIG. 1, a parallel feed architecture 60 requires longer switchable, or variable, delay-lines time-delay-line circuits 18. The maximum time-delay required is (Nd/2c)=a/2c, where a is the aperture size, c is the velocity of light, and N is the number of radiating elements. However, there is less insertion loss since only level m time-delays are in series where 2m =N. The loss is sufficiently small so that it can be compensated by amplification in the solid state modules. For the corporate feed configurations, there is no need for bias time time-delay circuits 32, as shown in FIG. 1.
For a two-dimensional array many linear array feed networks could be stacked, say in the vertical plane and combined by one further such network. Monopulse can be added readily with a second vertical combiner and horizontal monopulse outputs. Optimization monopulse outputs with low sidelobes in both sum and difference channels is possible, but requires additional complexity.
A combination of series (FIG. 1) and corporate (FIG. 4) architecture 10 and 60, respectively, is possible in a variety of ways, with different parts of the dividing network using different configurations. Further, the binary divisions of the corporate architecture 60 may be replaced by any multiple division network. Time-delay architecture may also be combined with phase controlled subarrays. This would limit the bandwidth to that of the subarrays.
It is further possible to end-feed the array but that may lead to an asymmetric amplitude taper due to cumulative insertion losses that would require compensation.
In all embodiments, the amount of switchable time-delays may be increased to allow an excess for error correction.
A figure of merit (FOM) can be derived to assess the total provided switched time-delay of a system. It is given by the ratio ##EQU4## The total switched time-delay is the sum of the maximum values of all switchable time-delay networks used. The conventional system is a configuration where each radiating element has its own unique switchable time-delay. They vary from a/c at the edge to zero at the center, giving a total time delay of Na/2c. FOMs for the various configurations are shown in Table 1, and are plotted in FIG. 5. Table 1 shows the switchable time-delay for different architectures when compared with a conventional system as known in the art. A larger FOM indicates improvement, i.e., smaller total time delay required by the system.
The ultra-wide-bandwidth active phased array architecture, described above, makes use of simple, variable, and short time-delay circuits, as previously stated, substantially no different from the standard diode phaseshifters, but makes multiple use of the same device. The architecture is substantially frequency independent and thus allows some "shared
TABLE 1______________________________________COMPARISON OF DIFFERENT ARCHITECTURESUltra-Wideband Total SwitchableArchitecture Time Delay______________________________________Conventional Na/2c 1Series feed, FIG. 1 2a/c N/4Series-subarrays, FIG. 3 4a/c N/8Corporate feed, FIG. 4 (alogN)/(clog2) 0.15N/logN______________________________________
apertures" concepts. It may be applied to passive "phased" arrays although the losses for that application may be prohibitive. It can be applied to active "phased" arrays where losses can be made up by amplification on both transmit and receive.
For wide instantaneous bandwidth performance, in the conventional design of the prior art, long-time delay circuits have to be added, either with sub-arrays, or for ultra-widebandwidth, with one circuit per antenna element. This adds greatly to the complexity and cost of the antenna. Compromises are possible where the array is broken into subarrays with phase shifters. This results in fewer switched time-delay circuits but there is a corresponding limitation in bandwidth which is reduced to that of a subarray.
The preferred embodiments described above makes multiple use of switched time-delay circuits and thereby significantly reduce the total complexity of the system now practiced by the art. The teachings of the preferred embodiments make multiple use of switched time-delays and are applicable, preferably, to active arrays, where the losses are compensated by amplification of both transmitter and receiver signals, however, as stated above, such amplification may be added to other types of systems to make utilization of the preferred embodiments feasible.
The ultra-wideband architectures for switchable time-delay beamsteering of an antenna array are akin to the use of tapped delay lines as described in Radar Handbook 11-1 through 11-71 and 13-10, (Skolnick ed. 1970), which is hereby incorporated by reference. The same switched time-delay circuits are used for a multiplicity of antenna elements, and thereby greatly simplify wideband array scanning in comparison to conventional methods where switchable long time-delay circuits are used at each radiating element. Series feed networks are the simplest, but with large arrays high insertion losses have been shown. The effect of this loss is reduced by adding amplification. Series feeds with subarrays and corporate feed systems, by comparison, have shown a much smaller insertion loss. However, their total switchable time-delays are greater than with the series configuration, but still much smaller than with the conventional system now utilized in the art.
Although the invention has been described in relation to exemplary embodiments thereof, it will be understood by those skilled in the art that still other variations and modifications can be affected in these preferred embodiments without detracting from the scope and spirit of the invention.
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|International Classification||H01Q21/00, H01Q3/26|
|Cooperative Classification||H01Q21/0025, H01Q3/2682, H01Q3/26|
|European Classification||H01Q21/00D3, H01Q3/26, H01Q3/26T|
|Jul 21, 1998||AS||Assignment|
Owner name: NAVY, UNITED STATES OF AMERICA, THE, AS REPRESENTE
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:CHESTON, THEODORE;COLEMAN, H. PARIS;REEL/FRAME:009322/0353;SIGNING DATES FROM 19980119 TO 19980204