|Publication number||USH663 H|
|Application number||US 07/143,511|
|Publication date||Aug 1, 1989|
|Filing date||Jan 13, 1988|
|Priority date||Jan 13, 1988|
|Publication number||07143511, 143511, US H663 H, US H663H, US-H-H663, USH663 H, USH663H|
|Export Citation||BiBTeX, EndNote, RefMan|
|Classifications (6), Legal Events (5)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The present invention relates to probe heads having a plurality of probe points for use in probing interior and perimeter bonding pads of a chip.
Current methods of high-volume chip testing utilize complex, large and costly devices which are unreliable in testing some types of chips, most notably high-speed gallium arsenide devices. In addition, prior art probe heads typically probe only the outer perimeter of chips and are unable to test bonding pads located in the internal portion of chips undergoing test. An example of a commonly used fixed probe head for testing integrated circuits can be found in U.S. Pat. No. 4,563,640 to Hasegawa. This type of probe head fixture is typically mounted on an automated testing device which is used for high volume testing of integrated circuits before they are cut from a wafer. The testing procedure is for the probe head to be lowered onto the particular dye to be tested within the wafer, with the probe "fingers" lowered to contact the bonding pads to made electrical connections for testing. The fingers bring out the electrical paths to a test computer or similar machine which applies stimuli to the input pins and records responses on the output pins to determine whether the chip is good. After it has been determined whether the chip is good or bad, the probe head is raised and moved to a new location over another dye on the wafer to be tested. Process is repeated for each dye on the wafer until all of the chips have been tested.
The aforementioned probe heads of the prior art are designed to make electrical contact with a large number of bonding pads corresponding to a large number of I/0 pins and power pins. The manufacture and maintenance of such probe heads is expensive and the probe heads themselves are easily damaged. The probe lead wires from the test computer typically enter in a single planar surface and touch bonding pads that are located on the periphery of he chip to be tested. This design and location of the probe fingers makes for an extremely dense and large probe head since the probes are fixed in a conical radial array corresponding to the periphery of the chip. This radial design necessarily forces the outer diameter of the probe head with the connecting wires to be quite large. Thus, expansion of probe heads to handle a larger number of probe points and to have the ability to probe bonding pads within the internal portion of the chips becomes unwieldy.
The present invention overcomes the above-enumerated problems and other shortcomings associated with current chip testing devices.
In the drawing, in which like reference numerals indicate corresponding parts throughout the several views;
FIG. 1 is a perspective view of an embodiment of a probe head in accordance with the principles of the present invention;
FIG. 2 is a cross-sectional view of the probe head embodiment shown in FIG. 1, viewed from the top;
FIG. 3 is a partial side view of the probe head embodiment shown in FIG. 1;
FIG. 4 is a partial cut-away side view of the probe head embodiment shown in FIG. 1.
The present invention relates to a probe head of substantially rectangular construction for use in the testing of chips. The probe head has a body disposed about the perimeter of a fused silica window. Probe points extend in a high-density fixed configuration through the fused silica window. These probe points are formed at one end of continuous probe leads, the other ends of which are brought out to either twisted pair or shielded coaxial connections to a test computer which can compare the input stimulus to the output responses to determine the appropriate functioning of the chip. The probe leads are disposed in a plurality of layers, such that interior surface, as well as perimeter, probing and testing of chips is facilitated.
The probe head also includes a depth-limit plate extending over the edge of the fused silica window and connecting to the probe head body. This depth-limit plate prevents the probe points from being deformed due to excess downward pressure during the test process and holds the fused silica window in place.
An advantage of one embodiment of the present invention is that its reduced size in comparison to prior art devices reduces the amount of exposed wire and allows high-speed testing with very little noise or crosstalk between the probe wires, a feature which has good application for gallium arsenide logic.
Another advantage of one embodiment of the present invention is its capacity to be custom-designed to the type of chip being manufactured at a very low cost.
Yet another advantage of one embodiment of the present invention is its capacity for miniaturization, thus allowing compatibility with other miniaturized electrical components.
Still another advantage of one embodiment of the present invention lies in its disposal of probe leads in a plurality of layers, such that interior surface, as well as perimeter, probing and testing of a chip is facilitated.
The above described features and advantages, along with various other advantages and features of novelty, are pointed out with particularity in the claims annexed hereto and formig a part hereof. However, for a better understanding of the invention, its advantages, and objects attained by its use, reference should be had to the drawings which form a further part hereof and to the accompanying descriptive matter in which there is illustrated and described a preferred embodiment of the invention.
In the following detailed description of the preferred embodiment, reference is made to accompanying drawings which form a part hereof, and in which is shown by way of illustration a specific embodiment in which the invention may be practiced. This embodiment is described in sufficient detail to enable those skilled in the art to practice the invention and it is to be understood that other embodiments may be utilized and that structural changes may be made without departing from the scope of the present invention. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.
Referring now to the drawing, there is illustrated in FIGS. 1 through 4 an embodiment of a high-density probe head 20 in accordance with the principles of the present invention. The probe head 20 contains a number of electrically conductive probe leads 22 disposed about the substantially rectangular body 24 of the probe head 20. In the preferred embodiment, said probe leads are very small gold alloy wires. The body 24 is multi-layered and frame-like in construction, forming a rectangular border about a substantially transparent fused silica window 26, through which probe points 28 of the probe leads 22 extend. Those skilled in the art will recognize that any rigid support for the probe leads could be used in place of the fused silica window. Dimensions of the preferred embodiment of the device are very small; the probe head 20 is intended to be 100 mils long, 100 mils wide, and 30 mils deep. The probe leads 22 are intended to be 4 mils in diameter.
The probe leads 22 of the preferred embodiment enter the body 24 in a substantially perpendicular direction to the plane in which the top of the body 24 rests. Each lead 22 may vertically extend, in the preferred embodiment, for example to one of five different levels, at which point it horizontally pierces the body. Each of the leads 22 then extends horizontally through and out the frame-like body 24, such that the lead is disposed in the interior portion of the body, above some point of the fused silica window 26. The lead 22 then drops perpendicularly from its substantially horizontal position, such that it extends through open space in the interior of the body 24 before vertically piercing and extending through the fused silica window 26. The varied paths of individual probe leads 22 are best illustrated by a combination of FIGS. 2, 3 and 4.
The ends 28 of the leads 22 which extend through the fused silica window 26 are disposed at substantially the same distance between the surface of the fused silica window 26 and said ends, hereinafter referred to as probe points 28. The positioning of probe points 28 such that they are disposed over a substantial portion of the fused silica window 26, along with their characteristic as being of substantially similar distance from the surface of the fused silica window 26, facilitates the probing of a chip for test purposes.
Depth control on the apparatus is accomplished through the presence of a depth-limit plate 30 which extends over the edge of the fused silica window 26 and connects to the body 24. This plate 30 prevents the probe points 28 from being deformed due to excess downward pressure during the test process and holds the fused silica window 26 in place.
In use, the probe head 20 is placed into contact with a chip under testing such that each probe point 28 electrically connects to a bonding pad of the chip. The probe leads 22 are brought out to either twisted pair or shielded coaxial connections to a test computer which can compare the input stimulus to the output responses to determine the appropriate functioning of the chip. In this fashion, chips may be tested before they are sliced from the wafer on which they are manufactured, thus reducing the cost of packaging faulty components. In addition, the probe head 20 may possess custom-designed probe points 28 which correspond to a specific type of chip.
While the present invention has been described in connection with the preferred embodiment thereof, it will be understood that many modifications will be readily apparent to those of ordinary skill in the art, and this application is intended to cover any adaptions or variations thereof. Therefore, it is manifestly intended that this invention be limited only by the claims and the equivalents thereof.
|U.S. Classification||324/756.04, 324/755.07, 324/762.03|
|Jan 13, 1988||AS||Assignment|
Owner name: CRAY RESEARCH, INC., 608 SECOND AVENUE SOUTH, MINN
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:MASSOPUST, DAN;REEL/FRAME:004822/0182
Effective date: 19880106
|Jun 28, 2000||AS||Assignment|
Owner name: TERA COMPUTER COMPANY, WASHINGTON
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:CRAY RESEARCH, L.L.C.;REEL/FRAME:011231/0132
Effective date: 20000524
|Apr 27, 2001||AS||Assignment|
Owner name: CRAY, INC., WASHINGTON
Free format text: CHANGE OF NAME;ASSIGNOR:TERA COMPUTER COMPANY;REEL/FRAME:011712/0145
Effective date: 20010423
|Dec 31, 2001||AS||Assignment|
Owner name: CRAY INC., WASHINGTON
Free format text: CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE ASSIGNEE, FILED ON 12-31-2001. RECORDED ON REEL 012322, FRAME 0143;ASSIGNOR:TERA COMPUTER COMPANY;REEL/FRAME:012322/0143
Effective date: 20000403
|Aug 24, 2005||AS||Assignment|
Owner name: WELLS FARGO BANK, N.A., CALIFORNIA
Free format text: SECURITY AGREEMENT;ASSIGNOR:CRAY INC.;REEL/FRAME:016446/0675
Effective date: 20050531