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Publication numberUSRE35121 E
Publication typeGrant
Application numberUS 07/897,443
Publication dateDec 12, 1995
Filing dateJun 9, 1992
Priority dateJul 6, 1988
Fee statusPaid
Also published asDE68910597D1, DE68910597T2, EP0350462A2, EP0350462A3, EP0350462B1, US4933827
Publication number07897443, 897443, US RE35121 E, US RE35121E, US-E-RE35121, USRE35121 E, USRE35121E
InventorsMarco Olivo, Luigi Pascucci, Corrado Villa
Original AssigneeSgs-Thomson Microelectronics S.R.L.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Regulation of the output voltage of a voltage multiplier
US RE35121 E
Abstract
The regulation of the output voltage of a voltage multiplier driven by a ring oscillator, an inverter of which is substituted by a NOR gate for providing a terminal through which stopping the oscillation, is effected by controlling the oscillation frequency in function of the current delivered by the voltage multiplier by means of a transistor T1 working as a current generator connected in series with a regulating chain of series-connected diodes by biasing the gate of the transistor with a constant voltage Vref, thus imposing a reference current Iref through the transistor. The voltage signal across the transistor is fed to the input of a first inverter with a preset triggering threshold and the output signal of the inverter is fed through an amplifying and phase-regenerating stage to said terminal for stopping the oscillation of said NOR gate of the ring oscillator. When the discharge current through the regulating chain becomes greater than the imposed current Iref, across the transistor T1 a voltage signal develops which, beyond a certain threshold, determines the switching of the inverter and, through the amplifying and phase-regenerating stage, causes a stop of the oscillation which resumes only when conduction through the regulating chain stops. At steady state the oscillation frequency will result controlled so as to maintain constant the output voltage of the voltage multiplier and to limit the discharge current through the regulating chain thus limiting power consumption.
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Claims(1)
    What we claim is: .[.1. A circuit for regulating the output voltage of a system for multiplying a supply voltage comprising a multistage voltage multiplier circuit, wherein each stage is formed essentially by a diode and a capacitor connected so as to transfer electric charge in a single direction from a supply terminal to an output capacitor to which an output terminal of the voltage multiplier is connected, an oscillator capable of generating two driving signals with a 180 phase difference between each other for driving the charge transfer from any stage to a successive stage of said multistage multiplier and having an input terminal (C) for applying an oscillation stop signal, and a chain of diodes or of diode-equivalent structures functionally connected in series between said output terminal of the voltage multiplier and ground for regulating the output voltage, characterized by comprising
  1. threshold of said trigger circuit. .Iaddend..Iadd.4. The circuit of claim 3 wherein said constant current generator is a transistor..Iaddend. .Iadd.5. The circuit of claim 4 wherein said transistor is a field effect transistor having a source-drain current path connected between said voltage regulator and ground, and a gate connected to a reference potential..Iaddend. .Iadd.6. The circuit of claim 3 wherein said trigger circuit comprises an inverter and a Schmitt trigger..Iaddend. .Iadd.7. The circuit of claim 6 wherein said trigger circuit regenerates the phase of said first signal in said oscillation interrupt signal..Iaddend. .Iadd.8. The circuit of claim 3 wherein said voltage regulator comprises a chain of diodes..Iaddend. .Iadd.9. The circuit of claim 8 wherein said diodes are diode-connected transistors..Iaddend. .Iadd.10. The circuit of claim 9 wherein said diode-connected transistors are p-channel transistors..Iaddend. .Iadd.11. The circuit of claim 9 wherein said diode-connected transistors are Zener diodes..Iaddend. .Iadd.12. The circuit of claim 9 wherein said diode-connected transistors are parasitic transistors..Iaddend. .Iadd.13. The circuit of claim 3 wherein said voltage multiplier is a multistage circuit each comprising a diode and capacitor connected to transfer a charge from an input to an output, and wherein said oscillator provides a plurality of phased driving signals connected to drive the charge through the stages of said voltage multiplier..Iaddend. .Iadd.14. The circuit of claim 3 wherein said oscillator is a ring oscillator..Iaddend. .Iadd.15. The circuit of claim 14 wherein said ring oscillator comprises two outputs phased 180 apart..Iaddend. .Iadd.16. The circuit of claim 14 wherein said ring oscillator comprises a NOR gate providing an invertor function, an input of said NOR gate providing said terminal for receiving an oscillation interrupt signal..Iaddend.
Description
BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a circuit for regulating the output voltage of a voltage multiplier which is particularly effective in reducing power consumption.

2. Description of the Prior Art

In integrated circuits when a higher voltage than the supply voltage of the device is required, as for example in EEPROM and EPROM type memory devices, a .[.peculiar circuit known as.]. voltage multiplier capable of producing an output voltage of several tens .Iadd.of .Iaddend.Volts starting from an input supply voltage of about 5 Volts and of delivering a current of about .Iadd.a .Iaddend.few tens .[.microampers.]. .Iadd.of microamperes .Iaddend.is employed. This circuit is well known and described in literature and is commonly associated with an oscillator which produces two signals with a 180 phase-shift between them, necessary for driving electric charge transfer through the various stages of the voltage multiplier, each stage being formed essentially by a diode and by a capacitor, in a single direction from a supply terminal to an output capacitor across which the multiplied voltage is produced, and with control means of the output voltage for keeping it constant independently from the load and/or from changes of the supply voltage.

A complete voltage multiplier system which is commonly used in integrated circuits is depicted in FIG. 1.

In the diagram the three circuit blocks forming the system are depicted. The voltage multiplier is a four stage circuit, each stage being formed by a diode (diode connected transistor) and by a capacitor, connected so as to transfer the charge in a single direction from an input terminal to an output terminal thereof, i.e..Iadd., .Iaddend.from the supply terminal VCC to the output capacitor COUT. The oscillator generating the two driving signals phi 1 and phi 2, with a 180 phase difference for driving the voltage multiplier is a common ring-type oscillator, wherein one of the three inverters composing it is substituted by a Schmitt trigger in order to achieve a greater ring's gain, and a second inverter is substituted by a NOR gate in order to permit interruption of the oscillation by applying a logic stop signal to the C terminal. The regulation means of the output voltage of the voltage multiplier is, as customary, formed by a "chain" of series-connected diodes (diode-connected transistors) connected between the high voltage (HV) output terminal and ground; the output voltage being adjusted to a value corresponding to the sum of the threshold voltages of the diode-connected transistors forming the chain. Of course.Iadd., .Iaddend.the regulation means may also be implemented by means of one or more Zener diodes.Iadd., .Iaddend.or by one or more parasitic transistors, according to techniques which are well known to the skilled technician.

All these simple regulators which are commonly used for stabilizing the output voltage of a voltage multiplier, .[.being.]. the overall current delivered by such a circuit generally .Iadd.being .Iaddend.very small, absorb a relatively significant portion of the current being delivered to the load, i.e. to the circuit which is supplied with the high voltage, without an excessive variation of the output voltage. Of course the current drawn by the regulating chain .[.is higher the more capable.]. .Iadd.increases as the capability of .Iaddend.the voltage multiplier .[.is of delivering.]. .Iadd.to deliver .Iaddend.current to it .Iadd.increases.Iaddend., and this largely depends upon the frequency of oscillation of the driving signals phi 1 and phi 2 and upon the capacitance of the "pumping" capacitors of the voltage multiplier.

Since the voltage multiplier must be designed so as to be capable of supplying at least the current required by the high voltage circuits fed under the worst operation situation which may be contemplated, the operating frequency of the oscillator must be set at least to a value sufficient to generate such a contemplated maximum current to be delivered. As a consequence, under any other different working situation, an unduly high frequency of oscillation inevitably produces a waste of energy because the excess current produced by the voltage multiplier is discharged to ground by the regulation means of the output voltage. Moreover.Iadd., .Iaddend.these output voltage regulation means, made in accordance with common techniques, may significantly modify the output voltage when the current absorption becomes too high and above all may increase the power consumption due to the oscillator switching itself, this power consumption becoming remarkable when the capacitances to be driven by the driving signals phi 1 and phi 2 produced by the oscillator sum up to several tens .Iadd.of .Iaddend.picoFarads and when the oscillator frequency is about 5-6 MHz.

Though these high consumption conditions may not be encountered normally in correctly designed circuits and wherein the supply voltage VCC is sufficiently stable, the case is different when the supply voltage may vary, for example, from 2.5 V to 5.5 V, or in devices designed for operation with either one of two contemplated voltages, e.g. 3 and 5 V.

In these instances, once a minimum frequency compatible with a supply voltage of, for example, 2.5 V of the oscillator is set during designing, the frequency will be sensibly higher when the supply voltage is 5.5 V with a consequent sensible increase of the current delivered by the voltage multiplier and therefore of the power consumption in general.

OBJECTIVES AND SUMMARY OF THE INVENTION

The present invention has as an objective an improved circuit for regulating the output voltage of a voltage multiplier capable of effectively limiting the power consumption. The solution provided contemplates controlling the frequency of oscillation of the oscillator which generates the two driving signals phi 1 and phi 2 of the voltage multiplier circuit in function of the current delivered by the latter.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit diagram of a voltage multiplier system made in accordance with the prior art.

FIG. 2 is a circuit diagram of a voltage multiplier system made in accordance with the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT

The improved circuit of the invention for regulating the output voltage of a voltage .[.multipling.]. .Iadd.multiplying .Iaddend.system for a supply voltage VCC is depicted in FIG. 2. The circuit blocks relative to the voltage multiplier circuit and to the ring oscillator driving it may be, as shown in FIG. 2, similar to those utilized in the prior art system as schematically depicted in FIG. 1.

By contrast, the regulating means of the HV output voltage of the voltage multiplier which, in the example shown, may be a chain of diode-connected transistors (p-channel transistors in the case depicted) presenting a total threshold voltage substantially equal to the regulated voltage desired, has a transistor T1, functioning as a current generator, whereby the Vgs (gate-source voltage) thereof is kept substantially constant independently of the supply voltage, connected in series thereto. As shown, the gate of the transistor T1 is biased at a constant voltage Vref, which may be obtained by means of a conventional reference constant voltage generator (not shown in FIG. 2), thus setting a certain reference current Iref through the transistor T1, which current may conveniently be about 1 microamperes.

By supposing to power the circuit, the HV output voltage of the circuit will be initially equal to the supply voltage VCC less the voltage drop across the five diode-connected transistors of the five stages of the voltage multiplier circuit respectively. If the chain of diode-connected transistors which regulates the output voltage has.Iadd., .Iaddend.for example, a total threshold voltage of 12 V, until the output voltage HV reaches such a value no current will flow through the regulation chain.Iadd., .Iaddend.and therefore the voltage HV-REG across the transistor T1 will be substantially at ground potential because of the relatively small current: Iref, imposed by the current generator formed by the transistor T1. The HV-REG signal is on the other hand fed to the input of an inverter 1 and the corresponding output signal of the inverter 1 is fed to the input of a Schmitt trigger the output signal of which is fed to the enable terminal C of the ring oscillator (i.e. of the NOR gate which substitutes one of the inverters which functionally form a ring oscillator).

Therefore, when the HV-REG signal is substantially at ground potential, equally at ground potential will be the STOPOSC signal produced at the output of the Schmitt trigger and the ring oscillator will be free of oscillate with a frequency which, as already said, may depend upon the value of the supply voltage VCC.

After a certain number of oscillations depending from the value of VCC, i.e..Iadd., .Iaddend.from the amplitude of the driving signals phi 1 and phi 2 and from the threshold voltage of the diode-connected transistors of the various stages of the voltage multiplier, the output HV voltage of the voltage multiplier will reach the threshold voltage determined by the regulating chain of diode-connected transistors, and through the chain the current which is not absorbed by the circuits fed with the high voltage HV will be discharged to ground. As soon as the value of such a current discharged to ground becomes higher than the current imposed by the current generator T1, i.e..Iadd., .Iaddend.Iref, the potential of the node HV-REG will start to rise and eventually, through the suitably unbalanced inverter 1 and the Schmitt trigger which regenerates the phase of the signal and amplifies it to a full logic value, the STOPOSC signal will stop the oscillator. At this point, the voltage multiplier circuit may no longer transfer electric charge to the output capacitor COUT, which begins to discharge and the output voltage HV slowly drops until the regulating chain is no longer capable of letting discharge current through because the voltage across the chain has fallen below the total threshold voltage thereof. The starting situation wherein the HV-REG signal assumes a ground potential and the oscillator is again free to oscillate is therefore re-established. In this situation, just .Iadd.a .Iaddend.few oscillations may be sufficient to .[.rise.]. .Iadd.raise .Iaddend.the output voltage HV again to the value at which the regulating circuit intervenes again to stop the oscillator and so on, until, in the limit, even a single oscillation will suffice.

At steady state, with a constant current drawn by the circuits powered through the HV output terminal of the circuit, there will be a resulting controlled oscillation frequency which will be as high as large is the current drawn and the whole system will provide substantially only this current without any substantial waste of current through the output voltage regulating chain with the exception of a limit current of the same order of the reference current Iref of about 1 microamperes, which is determined by the current generator formed by the transistor T1. In this way the total power consumption which notably depends strongly on the frequency of the oscillator, will be effectively reduced in accordance with the set objective.

As it will be apparent to the skilled technician, the use of a Schmitt trigger within the ring oscillator frequency regulation network, as shown in the embodiment of FIG. 2, is not strictly necessary, being the Schmitt trigger easily replaceable by any amplifying stage capable of producing through an output terminal thereof a signal of a desired level in function of the output signal of the first inverter 1 and regenerated in term of phase in respect of said HV-REG signal.

By the term "diode" often used in the specification and in the claims for describing the elements composing said regulating chain, it is intended to indicate any structure functionally equivalent to a diode.

Patent Citations
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US4250414 *Jul 31, 1978Feb 10, 1981Bell Telephone Laboratories, IncorporatedVoltage generator circuitry
US4302804 *Sep 4, 1979Nov 24, 1981Burroughs CorporationDC Voltage multiplier using phase-sequenced CMOS switches
US4344003 *Aug 4, 1980Aug 10, 1982Rca CorporationLow power voltage multiplier circuit
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Referenced by
Citing PatentFiling datePublication dateApplicantTitle
US5717581 *Oct 15, 1996Feb 10, 1998Sgs-Thomson Microelectronics, Inc.Charge pump circuit with feedback control
US5905291 *Jul 18, 1995May 18, 1999Seiko Instruments Inc.MISFET semiconductor integrated circuit device
US6430067 *Apr 12, 2001Aug 6, 2002Sun Microsystems, Inc.Voltage multiplier for low voltage microprocessor
US7372318 *Jul 26, 2004May 13, 2008Honeywell International Inc.Precision, low drift, stacked voltage reference
WO2005043733A1 *Oct 29, 2004May 12, 2005Rolf Friedrich Philipp BeckerApparatus serving as high voltage charge pump and circuit based thereon
Classifications
U.S. Classification363/60
International ClassificationH01L27/04, H01L21/822, G11C5/14, G11C16/30, H02M3/07
Cooperative ClassificationG11C5/145, G11C16/30, H02M3/073
European ClassificationG11C16/30, G11C5/14P, H02M3/07S
Legal Events
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Nov 20, 2001FPAYFee payment
Year of fee payment: 12
Sep 25, 1997FPAYFee payment
Year of fee payment: 8