US RE38010 E1 Abstract An encoder for encoding data as trellis coded data and a decoder for decoding the trellis coded data. The encoder uses a rate ½ convolutional encoder punctured to a rate k/n to produce n symbols from k input bits. The symbols are converted by a converter to sets of p symbols and provided to an interleaver. In the interleaver certain ones of the symbols are delayed. Symbol sets are output from the interleaver to a 2
^{P}-ary modem for modulation and transmission. The decoder uses a modem for providing from the modulated data sets of p symbols. A deinterleaver delays certain ones of the symbols to achieve time alignment of the originally interleaved symbols. The sets of time aligned symbols are provided to metric calculators for computing signal metrics which are provided to a converter for providing n sets of metrics to a metric decoder. The metric decoder computes from the n sets of metrics an estimate of the encoded k data bits.Claims(36) 1. A method for encoding digital data for trellis modulation comprising the steps of:
receiving k input data bits;
encoding said k input data bits according to a first encoding format of a rate {fraction (
1/2)} encoder punctured for rate k/n where k and n are integers and k/n is a fraction greater than {fraction (1/2)} to provide n symbols; converting said n symbols to provide said n symbols as a sequence of sets of at least three symbols;
delaying for a predetermined first duration a second symbol of each set of three symbols;
delaying for a predetermined second duration a third symbol of each set of three symbols; and
providing for modulation an interleaved symbol set including a first symbol of one of said sets of symbols with corresponding delayed second and third symbols of previous symbol sets.
2. The method of
3. A method for decoding interleaved trellis modulated data comprising the steps of:
receiving and decoding, in accordance with a first decoding format; of rate {fraction (
1/2)} punctured for rate k/n where k and n are integers and k/n is a fraction greater than {fraction (1/2)}; said interleaved trellis modulated data to provide sets of three symbols; delaying for a predetermined first duration a first symbol of each set of three symbols;
delaying for a predetermined second duration a second symbol of each set of three symbols;
combining delayed first and second symbols with third symbols of said sets of three symbols to provide a set of n symbols; and
decoding according to a decoding format said set of n symbols.
4. The method of
5. An apparatus for encoding data, comprising:
encoding means for receiving user data and encoding said user data into a first number of encoded symbol streams by a rate {fraction (
1/2)} encoder punctured for rate k/n where k and n are integers and k/n is a fraction greater than {fraction (1/2)}; symbol grouping means for converting said first number of encoded symbol streams into a different second number of reordered encoded symbol streams, said symbol grouping means comprising a plurality of delay means wherein each of said plurality of delay means delays ones of said second number of reordered encoded symbol streams by different delays; and
transmitter means for receiving successive sets of encoded symbols provided by said second number of reordered encoded symbol streams, and for modulating and transmitting said successive sets of encoded symbols in accordance with a predetermined encoding format.
6. The apparatus of
7. The apparatus of
8. The apparatus of
9. The apparatus of
10. The apparatus of
11. A method for encoding data, comprising the steps of: receiving user data; encoding said user data in accordance with a predetermined coding format to provide a first number of encoded symbol streams;
converting said first number of encoded symbol streams into a different second number of reordered encoded symbol streams, the step of converting further including the step of delaying ones of said second number of reordered encoded symbol streams by different delays; and
transmitting symbol sets provided by said second number of reordered encoded symbol streams in accordance with a predetermined encoding format;
wherein said predetermined coding format is a convolutional rate {fraction (
1/2)} encoding punctured for rate k/n where k and n are integers and k/n is a fraction greater than {fraction (1/2)}. 12. The method of
13. The method of
14. The method of
15. The method of
16. The method of
17. A system for encoding data, comprising:
an encoder having an input for receiving user data and encoding said user data in accordance with a first predetermined coding format and having an output for providing encoded symbols;
a symbol buffer having an input coupled to said encoder output for reordering said encoded symbols in accordance with a predetermined grouping format and having an output, said symbol buffer comprising a plurality of delay elements wherein each of said plurality of delay elements delays ones of said encoded symbols by different delays; and
a transmitter having an input coupled to said symbol buffer output for modulating and transmitting sets of said reordered encoded symbols, said sets of said reordered encoded symbols each being mapped to a modulation value in accordance with a second predetermined coding format;
wherein said predetermined encoder is a convolutional rate {fraction (
1/2)} encoding punctured for rate k/n where k and n are integers and k/n is a fraction greater than {fraction (1/2)}. 18. The system of
19. The system of
20. The system of
21. The system of
22. The apparatus of
23. An apparatus for decoding data, comprising:
demodulator means for receiving a transmitted signal and for demodulating said transmitted signal in accordance with a predetermined demodulation format to provide a first number of streams of symbol estimates;
symbol grouping means for converting said first number of streams of symbol estimates into a different second number of streams of reordered symbol estimates, said symbol means comprising a plurality of delay means wherein each of said plurality of delay means delays ones of said first number of streams of symbol estimates by different delays; and
decoder means for decoding symbol sets provided by said second number of streams of reordered symbol estimates.
24. The apparatus of
25. The apparatus of
26. The apparatus of
27. A method for decoding data, comprising the steps of:
receiving a transmitted signal;
demodulating said transmitted signal in accordance with a predetermined demodulation format to provide a first number of streams of symbol estimates;
converting said first number of streams of symbol estimates into a different second number of streams of reordered symbol estimates, said step of converting including the step of delaying ones of said first number of streams of symbol estimates by different delays; and
decoding symbol sets provided by said second number of streams of reordered symbols estimates.
28. The method of
29. The method of
30. The method of
31. A system for decoding data, comprising:
a demodulator having an input for receiving a transmitted signal and for demodulating said transmitted signal in accordance with a predetermined demodulation format and having an output to provide sets of symbol estimates, each of said sets of symbol estimates being associated with a modulation value based upon said predetermined demodulation format;
a symbol buffer having an input coupled to said demodulator output, for reordering said sets of symbol estimates in accordance with a predetermined grouping format and having an output for providing sets of reordered symbol estimates, said symbol buffer comprising a plurality of delay elements wherein each of said plurality of delay elements delays ones of said symbol estimates within each of said sets of symbol estimates by different delay durations; and
a decoder having an input coupled to said symbol buffer output for decoding said sets of reordered symbol estimates in accordance with a predetermined decoding format.
32. The system of
33. The system of
34. The system of
35. A system for encoding digital data for trellis modulation comprising:
first means for receiving k input data bits;
second means for encoding said k input data bits according to a first encoding format to provide n symbols;
third means for converting said n symbols to provide said n symbols as a sequence of sets of at least three symbols;
fourth means for delaying for a predetermined first duration a second symbol of each set of three symbols;
fifth means for delaying for a predetermined second duration a third symbol of each set of three symbols; and
sixth means for providing an interleaved symbol set including a first symbol of one of said sets of symbols with corresponding delayed second and third symbols of previous symbol sets.
36. A system for decoding interleaved trellis modulated data comprising:
first means for receiving and decoding said interleaved trellis modulated data to provide sets of three symbols;
second means for delaying for a predetermined first duration a first symbol of each set of three symbols;
third means for delaying for a predetermined second duration a second symbol of each set of three symbols;
fourth means for combining delayed first and second symbols with third symbols of said sets of three symbols to provide a set of n symbols; and
fifth means for decoding according to a decoding format said set of n symbols.
Description This application is a continuation of application Ser. No. 08/023,788, filed on Feb. 22, 1993 now abandoned. I. Field of the Invention The present invention relates to data communications. More particularly, the present invention relates to a novel and improved method and apparatus for encoding and decoding trellis modulated data based upon punctured convolutional codes. II. Description of the Related Art The field of data communications is concerned with raising the data throughput of a transmission system with a limited signal to noise ratio (SNR). The use of error correcting circuitry such as the Viterbi decoder allows system tradeoffs to be made with smaller SNRs or higher data rates to be used with the same bit error rate (BER). The decrease in the SNR needed is generally referred to as coding gain. Coding gain may be determined from bit error performance curves. In a graph of bit error performance curves, the BER of uncoded and various coded data is charted against E The coding rate and constraint length are used to define the Viterbi decoder. The coding rate (m/n) corresponds to the number of coding symbols produced (n) for a given number of input bit (m). The coding rate of ½ has become one of the most popular rates, although other code rates are also generally used. One class of codes with m≠1 are called punctured codes and are produced by discarding or erasing symbols from the rate 1/n code. The constraint length (K) is related to the length of the conventional encoder used in the encoding of the data. A constraint length of K=7 is typical in convolutional coding schemes. The convolutional encoder can be thought of as a Finite Impulse Response (FIR) filter with binary coefficients and length K−1. This filter produces a symbol stream with 2 The basic principal of the Viterbi algorithm is to take a convolutionally encoded data stream that has been transmitted over a noisy channel and use the properties of the convolutional code to determine the transmitted bit stream. The Viterbi algorithm is a computationally efficient method of updating the conditional probabilities of all 2 A chainback operation, an inverse of the encoding operation, is performed in which the p·2 Constraint lengths of K less than 5 are too small to provide any substantial coding gain, while systems with K greater than 7 are typically too complex to implement as a parallel architecture on a single VLSI device. As the constraint length increases, the number of interconnections in a fully parallel computation section increases as a function of (2 In the paper “Channel Coding with Multilevel/Phase Signal” by G. Ungerboeck, IEEE Transactions on Information Theory, Vol. IT-28, pgs. 55-67, January 1982, a trellis coded modulation (TCM) was described. In Ungerboeck it was shown that within a given spectral bandwidth, it is possible to achieve an Asymptotic Coding Gain of up to 6 dB by employing a rate (n−1)/n convolutional code and doubling the signal set. Unfortunately, for each modulation technique and for each bit rate, the maximal coding again is achieved by a different convolutional code. Further disclosed were the results of a search for all convolutional codes for several rates and modulation techniques, and the best codes presented. In the paper “A Pragmatic Approach to Trellis-Coded Modulation” by A. J. Viterbi, J. K. Wolf, E. Zehavi and R. Padovani, IEEE Communications Magazine, pgs. 11-19, July 1989, a pragmatic approach to trellis coded modulation (PTCM) was disclosed. The underlying concept therein is that a somewhat lower coding gain is achievable by a PTCM based on the “industry standard” rate ½, K=7 convolutional code. Although a lower coding gain is realized, it is very close to the coding gain of Ungerboeck at BERs of interest. Trellis coding is an attractive coding technique since it possesses an aspect which other coding techniques lack. The power of trellis coding lies in the fact that even though no apparent coding operation is performed on some of the bit(s) of the input data, the decoder is able to provide error correction on all bits. Generally the use of TCM techniques to achieve efficient use of power-bandwidth resources has been limited to low speed applications in digital signal processor implementations. The use of PTCM techniques enable VLSI implementations of an encoder/decoder capable of operating at high rates. A decoder using PTCM techniques is capable of handling different modulation techniques, such as M-ary phase-shift keying (M-ary PSK) including Binary PSK (BPSK), Quadrature PSK (QPSK), 8-PSK, and 16-PSK. In the paper, “Development of Variable-Rate Viterbi Decoder and Its Performance Characteristics,” Sixth International Conference on Digital Satellite Communications, Phoenix Ariz., September 1983, Y. Yasuda, Y. Hirata, K. Nakamura and S. Otani discuss a method whereby a class of high rate binary convolutional codes can be constructed from a single lower rate binary convolutional code. The advantage of punctured codes for binary transmission is that the encoders and decoders for the entire class of codes can be constructed easily by modifying the single encoder and decoder for the rate ½ binary convolutional code from which the high rate punctured code was derived. The current invention will be concerned primarily with rate (m−1)/m binary convolutional codes (m a positive integer greater than or equal to 3) formed from puncturing a particular rate ½ convolutional code which has become a de-facto standard of the communications industry. This code has constraint length It is therefore an object of the present invention to provide a novel method and circuitry for encoding and decoding trellis data using punctured rate ½ convolutional encoders. The present invention is a novel and improved method and apparatus for encoding and decoding trellis modulated data based upon punctured rate ½ convolutional codes. In accordance with the present invention, a trellis encoder and decoder are disclosed in which a circuit is provided that encodes and decodes based upon punctured rate ½ convolutional encoding. In the present invention, a transmitter encodes a bit stream, parallel or serial, according to a k/n encoding format provided by a punctured rate ½ encoder. For each set of k input bits n output symbols are provided by the first encoder. The n output symbols are then provided to a parallel n to parallel p converter that in effect gates the data symbols to provide sets of data of p symbols each. If n is divisible by p, the converter acts as a buffer to provide p symbols in each set. Otherwise the converter will wait for the next group of n symbols before providing the last group of p symbols from the current n symbols. Each set of symbols is provided to an interleaver comprised of p−1 parallel delay elements that can be implemented as digital delays or delay lines having delays of predetermined duration. The purpose of the interleaving proces is to increase the diversity in the data in such a way that if a modulated symbol is lost in transmission the error may be recoverable with the use of error correcting algorithms in the decoder. The output of the delays and the one undelayed symbol are then provided to an m-ary modulator that provides a modulation in accordance to the received bits. In the receiver, a decoder presents the received signal to a demodulator that converts the modulation values to sets of p symbols. These sets of symbols are then provided to a deinterleaver that has p−1 delay elements that can be implemented as digital delays or delay lines. The three deinterleaved symbols are provided to three separate metric calculators that calculate from the received symbols metrics that define quantities proportional to the likelihood of alternative received hypotheses. The metrics are provided to a parallel p to parallel n converter that provides the metric values of data as n metrics to a rate ½ punctured decoder that operates with the aid of the Viterbi algorithm to provide a corrected estimate of the transmitted bit sequence. The features, objects, and advantages of the present invention will become more apparent from the detailed description set forth below when taken in conjunction with the drawings in which like reference characters identify correspondingly throughout and wherein: FIG. 1 is a block diagram of a trellis encoder for a rate ½ encoder punctured for a rate k/n; FIG. 2 is a block diagram of a trellis decoder for decoding data encoded by a rate ½ encoder punctured for a rate k/n; FIG. 3 is a diagram illustrating the spatial relationships in octal modulated signal space. Referring to FIG. 1, an encoding circuit is disclosed for encoding digital data preferably by m-ary PSK modulation and transmission. Although the example illustrated in FIG. 1 is configured for 8 PSK modulation, other m-ary modulation schemes are readily derived therefrom. In FIG. 1 a bit stream is provided to encoder The n output symbols (C Each set of symbol data is provided to interleaver The purpose of the interleaving process is to increase the diversity of the transmitted signal. For example if a symbol is received weak or corrupted the interleaving process will disperse the effects of the lost signal among p nonconsecutive symbols. This will allow the Viterbi decoder to recover the correct data. A group of 3 bits (a,b,c) at the output of the interleaver is mapped by modem Referring to FIG. 2, the received modulated data r is received by demodulator or modem
where ∥r−μ(x,y,z)μ Each of metric calculators The metrics are provided to a parallel p to parallel n buffer The previous description of the preferred embodiments is provided to enable any person skilled in the art to make or use the present invention. The various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without the use of the inventive faculty. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein. Patent Citations
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