|Publication number||USRE40038 E1|
|Application number||US 10/959,947|
|Publication date||Jan 29, 2008|
|Filing date||Oct 7, 2004|
|Priority date||Apr 3, 1998|
|Also published as||CA2234037A1, DE69920422D1, DE69920422T2, EP1068705A1, EP1068705B1, US6463108, WO1999052251A1|
|Publication number||10959947, 959947, US RE40038 E1, US RE40038E1, US-E1-RE40038, USRE40038 E1, USRE40038E1|
|Inventors||Mohammad Hossein Shakiba|
|Original Assignee||Gennum Corporation|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (11), Non-Patent Citations (2), Referenced by (11), Classifications (10), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The present invention relates to the field of serial digital data communication systems. In particular, the present invention relates to latch-up avoidance and recovery in a serial digital data receiver using a quantized feedback DC restorer.
In a digital data communication system the transmitted data is generally attenuated and distorted by the medium and the AC coupling networks through which it is transmitted. This results, among other things, in a loss of the low frequency and DC components in the received data.
To combat this problem, receivers typically include a DC (direct current) restorer to restore or regenerate the low frequency and DC components of the transmitted input, and an automatic gain control (AGC) circuit which automatically changes the gain or amplification of the received input to maintain the level of the amplified signal essentially constant despite variations in input signal strength.
DC restorer circuits are generally implemented as either a clamping DC restorer or a DC restorer based on the principle of quantized feedback (QFB). Both clamping and quantized feedback restorer circuits are described in detail in U.S. Pat. No. 5,426,389, the description of said patent being incorporated herein by this reference. A QFB DC restorer circuit generally exhibits superior noise and jitter performance, however such circuits are susceptible to latching-up if the output of the restorer is in the incorrect state at the onset of data transmission. Prior art methods of overcoming the latch-up problem involve additional start-up circuitry and/or deviations in the QFB structure, and, as a result, require supplementary circuitry and exhibit inferior circuit performance.
Further, an important criteria in designing a QFB DC restorer is the delay which occurs in the feedback loop. Since any delay in the feedback loop of the QFB restorer adversely affects the construction of the signal spectrum at the input of the slicer of the restorer, delay should be kept at a minimum level. In particular, at high data rates, elegant and efficient circuit implementation techniques are critical for keeping the QFB circuit as simple as possible.
In one aspect, the present invention is a circuit for receiving an input signal and providing a quantized output signal in response, said quantized output signal being at either a first level or a second level, and said input signal being substantially at either said first level or said second level, said circuit comprising: (a) an automatic gain control (AGC) circuit for providing a gain signal which processes said input signal to output a controlled signal having a constant amplitude at either said first level or said second level, said AGC circuit being operative in a first mode to provide said gain signal in response to the difference between the level of said controlled signal and the level of said quantized output signal; (b) a restorer circuit coupled to said AGC circuit for receiving said controlled signal and for providing a quantized output signal in response; (c) a carrier detect circuit coupled to said AGC circuit and having an input for receiving said quantized output signal, said carrier detect circuit providing a detection signal for indicating the presence of a transition in the level of said quantized output signal, said detection signal being coupled to said AGC circuit; such that during periods when said detection signal indicates that there are transitions in the level of said quantized output signal, said AGC circuit is operative in said first mode, and during periods when said detection signal indicates that there are no transitions in the level of said quantized output signal, said AGC circuit is operative in a second mode wherein said gain signal is continually increased, at least to a predetermined level.
In one aspect, the present invention is a circuit for receiving an input signal and providing a quantized output signal in response. The circuit comprises an amplifier for providing a controlled signal in response to the input signal and a gain signal; a restorer circuit coupled to the amplifier, the restorer circuit including an internal feedback path; a carrier detect circuit having an input for receiving the quantized output signal, the carrier detect circuit providing a first detection signal and a second detection signal for indicating the presence of a transition in the level of the quantized output signal; and, an automatic gain control (AGC) circuit coupled to the amplifier, the restorer circuit and the carrier detect circuit for providing the gain signal in response to the controlled signal, the quantized output signal and the first detection signal. The circuit further comprises a feedback disabling circuit coupled to the carrier detect circuit and the restorer circuit for controllably enabling and disabling the internal feedback path in response to the second detection signal.
In another aspect of the present invention, said restorer circuit comprises: (a) a high-pass filter circuit for receiving said controlled signal and providing a high-pass filtered controlled signal in response; (b) a low-pass filter circuit for receiving said quantized output signal and providing a low-pass filtered quantized output signal in response, said low pass filter circuit providing a feedback path for said low-pass filtered quantized output signal; (c) a summer for adding said high-pass filtered controlled signal with said low-pass filtered quantized output signal to provide a slicer input signal; and (d) a slicer circuit for comparing said slicer input signal to a slicer reference signal and providing said quantized output signal at a slicer output terminal in response.
In another aspect, the present invention provides a method for avoiding a latch-up condition in the output of a digital data communication receiver which receives an input signal and provides a quantized output signal in response. The quantized output signal is either at a first level or a second level, and the input signal is substantially at either the first level or the second level. The receiver comprises an automatic gain control circuit, a quantized feedback DC restorer circuit, a carrier detect circuit and a feedback disabling circuit. The method comprises:
Thus, in further aspects of the present invention, said low pass filter circuit includes a disabling circuit responsive to said detection signal or a version thereof, so that said disabling circuit disables said feedback path, either entirely or partially, during periods when said detection signal indicates that there are no transitions in the level of said quantized output signal.
In further aspects of the present invention, the disabling circuit is responsive to said detection signal or a version thereof, so that said disabling circuit disables said internal feedback path, either entirely or partially, during periods when said detection signal indicates that there are no transitions in the level of said quantized output signal.
In the accompanying drawings which illustrate a preferred embodiment of the invention:
In a serial digital data communication system, when the signal passes through a high-pass filter (such as an AC-coupling network which, for example, might be present between a transmitter and a transmission line) it loses its low-frequency components and experiences the “zero-wander” effect. Zero wandering is illustrated in
To overcome the aforementioned problems, the lost low-frequency components of the high-pass filtered signal must be recovered and added to the signal before it is applied to a slicer for final detection.
One major drawback of the QFB approach, which has limited its use in practice, is the possibility of the occurrence of a latch-up. A latch-up occurs when the quantized output from the slicer 18 is at the wrong level at the onset of data transmission. Since a DC restorer based on QFB is a decision-directed detector, its correct operation depends on its initial state at the onset of data transmission. Because the level of the output 22 of the slicer 18 is fed back to be added with the high pass filtered input signal 14, the transitions in the input signal 10 may never be able to change the state of the slicer, and, as a result, the operation of the DC restorer may fail. Prevention methods proposed so far have been based on either employing additional start-up circuits or deviating the QFB structure: A. J. Baker, “An Adaptive Cable Equalizer for Serial Digital Video Rates to 400 Mb/s,” I E E E ISSCC, pp. 174-175, (1996); J. Gabara and W. C. Fischer, “Capacitive Coupling and Quantized Feedback Applied to Conventional CMOS Technology,” IEEE JSSC, pp. 419-427, Vol. 32, No. 3, Mar. 1997. Unfortunately, such solutions result in further complexities and/or in sacrifices to the performance of the QFB DC restorer circuit.
The amplifier 34 is not restricted to having a flat response, and could also shape the frequency spectrum of the signal for channel equalization (i.e. as an equalizer). Due to matching requirements, it is common practice to use either an intermediate signal 13 or the final output of the DC restorer 22 to generate the reference signal for the AGC circuit: A. J. Baker, “An Adaptive Cable Equalizer for Serial Digital Video Rates to 400 Mb/s,” IEEE ISSCC, pp. 174-175, (1996). In the illustrated embodiment of
As illustrated in
Because of the latch-up potential of QFB DC restorers, this type of DC restorer has not typically been used in the receiver architecture of FIG. 4. As already indicated, when QFB DC restorers have been used, they have either employed additional start-up circuitry or have deviated from the basic QFB structure in attempts to avoid the latch-up of the QFB DC restorer. Also, additional circuitry is may be required to mute the QFB restorer output when the latter does not contain useful information.
While the circuitry of the embodiment of
In this mode of operation (i.e with disabled feedback), the QFB DC restorer operates as a simple slicer and passes the amplified signal 10 to its output 22. Once a transition in signal 22 occurs (i.e. when input data 8 is present), the QFB DC restorer is switched to its normal mode, with its feedback enabled. The QFB DC restorer is forced, in this case, to start from the proper state, hence preventing or avoiding any latch-up problem. From this point on, and as long as the communication system is not disturbed, the receiver and DC restorer continue to operate in this mode. A drawback of the embodiment of
While theoretically, it is possible to design the QFB DC restorer circuit of the present invention for proper operation under any set of acceptable constraints, to accommodate for variations in manufacturing when the above concerns are critical, an intermediate solution between the embodiments of FIG. 6 and
The description of the circuit of
The embodiment of
As mentioned previously, simplicity of the QFB circuit is crucial in high data rate applications. Any significant delay in the QFB feedback loop deteriorates its performance due to the addition of timing jitter.
The circuits of
With the addition of transistors Q9 and Q10 in the circuit of
Alternatively, a portion of the biasing current can be bypassed. This can be implemented by adding another transistor to the circuit of FIG. 10A.
Thus, the present invention uses and processes signals which, typically, are already present in the receiver of a data communication system to prevent the latch-up problem in the QFB DC-restorer. This eliminates the overhead of the start-up circuitry. The present invention further provides means of preventing the latch-up problem by exploiting the inherent potentials of the stages preceding the QFB, such as the automatic gain control circuit. This approach again reduces the overhead since such stages are usually present in the system. As a result, the QFB DC restorer used in accordance with the present invention becomes very simple, and hence fast, since either no further latch-up precaution or minimal further precautions are required.
The present invention makes further use of the built-in mute operation of the above embodiments to cut off the output when there is no signal (or when there is a signal which is smaller than the minimum signal the system is designed to handle) at the input of the receiver. This built-in mute function is very valuable, as serial digital data communication systems usually require precautions to be taken in order to avoid suffering from unwanted outputs (such as oscillations or amplified noise) which typically accompany very small input signals. Moreover the present invention is very attractive for use in high data rate communication systems, since, while avoiding latch-up, it can still be designed to minimize delay, depending on the criteria of the specific application.
While preferred embodiments of the present invention have been described, the embodiments disclosed are illustrative and not restrictive, and the scope of the invention is intended to be defined only by the appended claims.
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|U.S. Classification||375/319, 327/307, 375/345, 455/234.1, 327/312|
|International Classification||H04L25/06, H04L25/10, H04L27/08|
|Jun 22, 2007||AS||Assignment|
Owner name: GENNUM CORPORATION, CANADA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SHAKIBA, MOHAMMAD HOSSEIN;REEL/FRAME:019467/0702
Effective date: 19980804
|May 17, 2010||REMI||Maintenance fee reminder mailed|
|Oct 10, 2010||LAPS||Lapse for failure to pay maintenance fees|