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Publication numberUSRE40623 E1
Publication typeGrant
Application numberUS 09/998,594
Publication dateJan 20, 2009
Filing dateNov 16, 2001
Priority dateMay 15, 1997
Fee statusLapsed
Also published asEP1004142A1, US5984190, WO1998052226A1
Publication number09998594, 998594, US RE40623 E1, US RE40623E1, US-E1-RE40623, USRE40623 E1, USRE40623E1
InventorsLeland R. Nevill
Original AssigneeMicron Technology, Inc.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Method and apparatus for identifying integrated circuits
US RE40623 E1
Abstract
An integrated circuit and method for identifying same is described. The integrated circuit includes a programmable identification circuit for storing electronic identification information. The integrated circuit also includes an optical identification mark displaying a machine-readable optical identification code which corresponds with the electronic identification information stored in the identification circuit. The data encoded in the optical identification code may be identical with that of the electronic identification information. Alternatively, a look-up table or other correlating means may be employed to associate the optical identification code with the electronic identification information. The integrated circuit is packaged in a housing, and another optical identification mark is placed on an external surface of the housing. This second optical identification mark displays a machine-readable optical identification code which is identical or correlated to the electronic identification information stored in the identification circuit and/or the optical identification code displayed by the optical identification mark on the integrated circuit. Consequently, convenient and traceable identification of individual integrated circuits is provided during and after manufacture.
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Claims(33)
1. A method of identifying a plurality of substantially identical integrated circuits formed on a common substrate, comprising the steps of:
programming each of the integrated circuits with respective electronic identification information distinguishing the integrated circuits from one another; and
marking each of the integrated circuits with respective optical identification code which corresponds with the respective electronic identification information;
reading the optical identification code on each of the integrated circuits; and
accessing a lookup table to associate the optical identification code on each of the integrated circuits with the corresponding electronic identification information.
2. The method of claim 1 wherein the step of programming each of the integrated circuits with electronic identification information includes the step of programming one of a plurality of programmable links.
3. The method of claim 1 wherein the step of marking each of the integrated circuits with optical identification code includes the step of placing an adhesive label on each of the integrated circuits.
4. The method of claim 1 wherein the step of marking each of the integrated circuits with optical identification code includes the step of inscribing a symbol on each of the integrated circuits.
5. The method of claim 1 wherein the step of marking each of the integrated circuits includes the step of marking respective portions of the substrate on which the integrated circuits are formed.
6. In a plurality of substantially identical integrated circuits formed on a common substrate, each of the integrated circuits including a programmable circuit for storing respective electronically readable identification code which distinguishes the integrated circuits from one another, a method of identifying the integrated circuits, comprising the steps of:
marking each of the integrated circuits with respective optical identification code;
accessing a lookup table to associate the optical identification code on each of the integrated circuits with the respective electronically readable identification code and
reading the optical identification code on each of the integrated circuits.
7. The method of claim 6 wherein the step of associating the optical identification code on each of the integrated circuits with the respective electronically readable identification code includes the steps of:
reading the electronically readable identification code stored in each of the integrated circuits;
reading the optical identification code marked on each of the integrated circuits; and
correlating the read electronically readable identification code with the read optical identification code for each of the integrated circuits.
8. The method of claim 6 wherein the step of associating the optical identification code on each of the integrated circuits with the respective electronically readable identification code includes the step of encoding identical data in the optical and electronically readable identification codes.
9. The method of claim 6 wherein the step of marking each of the integrated circuits includes the step of marking respective portions of the substrate on which the integrated circuits are formed.
10. A wafer comprising a plurality of dies, each die including an integrated circuit having a programmable identification circuit that stores identification data, and each die having an optical identification mark positioned thereon and encoding information corresponding to the identification data, optical identification mark on each die being accessed through a lookup table to correspond to the electronic identification information.
11. The wafer of claim 10 wherein the programmable identification circuit includes a plurality of programmable links.
12. The wafer of claim 10 wherein the optical identification mark encodes information identical to the identification data.
13. The wafer of claim 10 wherein the identification data uniquely distinguishes each of the dies.
14. A plurality of integrated circuit chips, each comprising:
a housing;
an integrated circuit enclosed within the housing and including an identification circuit that stores identification data distinguishing each of the integrated circuit chips from one another; and
an optical mark positioned on an exterior surface of the housing and encoding identification information being accessed through a lookup table to correspond to the identification data.
15. The integrated circuit chips of claim 14, further comprising electrical contacts connected to said housing and adapted to provide electrical connection between the integrated circuit and circuitry external to the housing.
16. The integrated circuit chips of claim 14 wherein the optical mark is a first optical mark encoding first identification information, and further comprising a second optical mark positioned on the integrated circuit enclosed within the housing and encoding second identification information corresponding to the identification data.
17. The integrated circuit chips of claim 16 wherein the first identification information is identical to the second identification information.
18. The integrated circuit chips of claim 14 wherein the identification information is the same as the identification data.
19. A method of identifying a plurality of substantially identical integrated circuits formed on a common substrate, each of the integrated circuits being formed on a respective one of a plurality of substrate dies, the method comprising:
programming each of the plurality of integrated circuits with respective electronic identification information for each of the integrated circuits; and
marking each of the dies with optical identification code which corresponds with the respective electronic identification information;
reading the optical identification code on each of the integrated circuits;
reading the electronic identification information from each of the integrated circuits; and
accessing a lookup table to associate the optical identification code on each of the integrated circuits with the corresponding electronic identification information.
20. The method of claim 19 wherein the electronic identification information is distinct for each of the integrated circuits.
21. The method of claim 19 wherein the optical identification code is distinct for each of the dies.
22. The method of claim 19 wherein the optical identification code and the electronic identification information include identical data.
23. A method of identifying an integrated circuit, comprising:
programming the integrated circuit with an electronic identification information;
marking the integrated circuit with an optical identification code that corresponds with the electronic identification information;
reading the electronic identification information; and
associating the optical identification code with the read electronic identification information through a correlation mechanism.
24. The method of claim 23 wherein the act of programming the integrated circuit with electronic identification information comprises programming at least one of a plurality of programmable links.
25. The method of claim 23 wherein the act of marking the integrated circuit with an optical identification code includes the step of placing an adhesive label on the integrated circuit.
26. The method of claim 23 wherein the correlation mechanism comprises accessing a correlation instrument.
27. The method of claim 26 wherein the correlation instrument comprises a lookup table.
28. The method of claim 26 wherein the correlation instrument contains the optical identification code and the electronic identification information for associating the optical identification code with the electronic identification information.
29. A method of identifying an integrated circuit, comprising:
programming the integrated circuit with an electronic identification information;
marking the integrated circuit with an optical identification code that corresponds with the electronic identification information;
reading the electronic identification information; and
cross-referencing the optical identification code with the read electronic identification information by utilizing a correlation instrument.
30. The method of claim 29 wherein the act of programming the integrated circuit with electronic identification information comprises programming at least one of a plurality of programmable links.
31. The method of claim 29 wherein the act of marking the integrated circuit with an optical identification code includes the step of placing an adhesive label on the integrated circuit.
32. The method of claim 29 wherein the correlation instrument comprises a lookup table.
33. The method of claim 29 wherein the correlation instrument contains the optical identification code and the electronic identification information for cross-referencing the optical identification code and the electronic identification information.
Description
TECHNICAL FIELD

This invention relates generally to integrated circuits, and more particularly to identification information for integrated circuits.

BACKGROUND OF THE INVENTION

Typically, many identical integrated circuits are constructed on a single wafer of semiconductor material, such as monocrystalline silicon or gallium arsenide. The portion of the wafer occupied by a single one of the integrated circuits is called a die. After completed fabrication of the integrated circuits, a series of tests (known as Probe) is performed in which the function of each die is tested. The test data collected for each die is used in subsequent assembly/packaging steps to ensure that only properly functioning die are packaged as integrated circuit chips.

Following the Probe test, the individual dies are separated from one another, and each properly functioning die is encapsulated (usually in plastic or ceramic) in a package having electric leads to form an integrated circuit chip. Subsequently, a series of testing operations is performed for each of the integrated circuit chips, with test data collected for each of the chips.

In order to properly correlate the various test results with the appropriate die or dies, accurate identification of each of the dies is required, both before and after packaging as an integrated circuit chip. The ability to identify particular dies can also be important following completed manufacture of the integrated circuit chip. For example, when an integrated circuit chip unexpectedly fails during later use, the manufacturer of the chip may wish to identify other potentially failing chips and the users of those chips.

Many of today's integrated circuits provide electronically readable identification information which is programmed into the integrated circuit itself—usually during Probe testing. Also, chip packages usually have an ink or laser-scribed mark which provides some useful information, such as date and country of manufacture, product and package types, speed and other test parameters, and manufacturing lot identification. However, information uniquely identifying the particular integrated circuit within a chip is included only in the electronically readable identification information.

The electronically readable identification information is usually available only during those manufacturing procedures in which the integrated circuit is electrically tested. Also, retrieving the electronically readable identification information is usually done with a relatively sophisticated semiconductor testing apparatus, which necessarily makes physical contact with the integrated circuit chip in order to access the identifying information. There exist a number of manufacturing process steps during which such physical contact does not occur, and hence traceable identification of the individual integrated circuit chips through the various manufacturing processes is quite difficult. Also, once the manufacturer ships the integrated circuit chip to a customer, the unique identification information is not readily available.

SUMMARY OF THE INVENTION

A method of identifying an integrated circuit is provided in which the integrated circuit is both programmed with electronic identification information and marked with a corresponding machine-readable optical identification code. The integrated circuit may be marked with an adhesive label, inscribed with a laser, or marked in any of a variety of suitable ways of displaying machine-readable optical identification codes. The integrated circuit may include a plurality of programmable links which are programmed to store the electronic identification information, or include any of a variety of suitable adapted circuits for non-volatile data storage.

The method further includes the steps of reading the optical identification code and associating it with the corresponding electronic identification information. A look-up table or other suitable correlating means may be used for performing the association step. Alternatively, the optical identification code may encode exactly the same data values as the electronic identification information.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram depicting an integrated circuit which includes an identification circuit and a machine-readable optical mark.

FIG. 2 depicts a semiconductor wafer including a plurality of dies, each of which has a machine-readable optical mark.

FIG. 3 depicts a packaged integrated circuit chip which has a machine-readable optical mark.

DETAILED DESCRIPTION OF THE INVENTION

In the following description, certain specific details are set forth in order to provide a thorough understanding of embodiments of the present invention. It will be clear, however, to one skilled in the art that the present invention may be practiced without these details. In other instances, well-known circuits and structures have not been shown in detail in order not to unnecessarily obscure the description of the embodiments of the invention.

FIG. 1 depicts an integrated circuit 10, which may be any of a wide variety of integrated circuits fabricated by conventional or newly developed methods. The integrated circuit 10 includes a programmable identification circuit 12 having a bank of programmable links 13, for storing electronic identification information uniquely identifying the integrated circuit. The identification circuit 12 can be any of a variety of circuits suitable for such purpose, whether currently well known or subsequently developed. The programmable links can be fuses, antifuses, or any of a wide variety of circuit elements suitable for non-volatile data storage, whether currently well known or subsequently developed. The method by which the identification circuit 12 is programmed to store the electronic identification information, as well as the method by which such information is retrieved from the identification circuit, can be any of a wide variety of methods for such purpose, whether currently well known or subsequently developed. For example, U.S. Pat. No. 5,301,143 to Ohri et al., which is incorporated herein by reference, describes an example programmable identification circuit 12 and methods for storing/retrieving information to/from same.

The integrated circuit 10 also includes a machine-readable optical identification mark 14. The identification mark 14 may be an adhesive label, a laser-scribed mark, or any of a wide variety of suitable marks. The identification mark 14 displays an optical identification code 15 which corresponds with the electronic identification information stored in the programmable identification circuit 12. The optical identification code 15 can be any of a wide variety of machine-readable optical identification codes, whether currently well known or subsequently developed. The optical identification code 15 can be read by any of a wide variety of methods and with corresponding ones of a wide variety of optical code readers, whether currently well known or subsequently developed. For example, a particular optical identification code and a method and apparatus for reading and decoding the code are described in U.S. Pat. No. 5,389,770 to Ackley, which is incorporated herein by reference.

FIG. 2 depicts a semiconductor wafer 16 on which a plurality of integrated circuits 10 have been constructed, each on a corresponding one of a plurality of semiconductor dies 18. On each of the dies 18 is a corresponding one of a plurality of the optical identification marks 14A, each having an optical identification code 15A which corresponds with the electronic identification information stored within the identification circuit 12 (see FIG. 1). FIG. 3 depicts a packaged integrated circuit chip 20, within which one of the dies 18 (see FIG. 2) is encapsulated. The integrated circuit 10 (see FIGS. 1 and 2) is electrically accessible via a plurality of electric leads 22. An outer surface of the packaged chip 20 is marked with an optical identification mark 14B having an optical identification code 15B which corresponds with the electronic identification information stored within the identification circuit 12 (see FIG. 1). Note that distinct reference numerals are used to identify the optical identification marks and codes in FIGS. 1-3, indicating that various non-identical identification marks and codes may be used at different stages of the manufacturing process.

Typically, the electronic identification information is programmed into the identification circuit 12 during. Probe testing of the various dies 18 included in the wafer 16. One or more of the identification marks 14-14B could then be produced to include an optical identification code which encodes data that is identical to the data stored in the identification circuit 12. In other words, the electronically accessible pattern of 1's and 0's stored in the identification circuit 12 is the same as the optically accessible pattern of 1's and 0's encoded in one or more of the identification marks 14-14B. Alternatively, one or more of the identification marks 14-14B can be correlated, via a look-up table or other conventional correlation means, with the particular electronic identification data stored in the identification circuit 12—a more flexible approach then requiring identical data.

Those skilled in the art will appreciate a number of advantages achieved by the above-described embodiments of the present invention. Conventionally, integrated circuits have included only the electronically accessible identification information, as well as visual marking information intended for human eyes. Thus accurate identification of individual integrated circuits has been available only during manufacturing processes in which the integrated circuit is electrically accessed. In contrast, the present invention provides identification marks having an optical identification code associated with the electronic identification information, thereby providing convenient, accurate and traceable identification of individual integrated circuits during and following the manufacturing process. Also, the ability to optically identify the integrated circuit avoids the need for physical contact, thereby minimizing the possibility of damage to the integrated circuit by the act of electronically reading the identification data—a common concern with current technology.

As stated above, the optical identification marks 14-14B can be any of a wide variety of such marks, and the method and apparatus for encoding optical identification information and reading such information can be any of a wide variety of suitable ones for such purpose. Similarly, the identification circuit 12 can be any of a wide variety of suitably adapted circuits, and the particular methods for programming and retrieving electronic identification information thereto and therefrom can be any of a wide variety of suitably adapted methods. It is the combination of both electrically accessible identification information and associated machine-readable optical identification codes which provides traceability of the identification optical through the manufacturing process, as well as after it has been shipped to a customer.

While certain embodiments of the invention have been described for purposes of illustration, various modifications may be made without deviating from the spirit and scope of the invention. Numerous variations are well within the scope of this invention, and accordingly, the invention is not limited except by the appended claims.

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Referenced by
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US8415813 *Jun 15, 2011Apr 9, 2013Truesense Imaging, Inc.Identification of dies on a semiconductor wafer
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Classifications
U.S. Classification235/492, 438/18, 438/10, 235/494
International ClassificationH01L23/544, G06K19/06, H01L23/00, H01L21/02
Cooperative ClassificationH01L2223/54473, H01L23/544, H01L2223/54486, H01L2223/5448, H01L2223/54413
European ClassificationH01L23/544
Legal Events
DateCodeEventDescription
Nov 11, 2011LAPSLapse for failure to pay maintenance fees
Jun 20, 2011REMIMaintenance fee reminder mailed
Mar 28, 2002ASAssignment
Owner name: HEWLETT-PACKARD COMPANY, COLORADO
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:STEVENS, MARK R.;CULBERTSON, W. BRUCE;REEL/FRAME:012758/0389
Effective date: 20011107