|Publication number||USRE40716 E1|
|Application number||US 11/593,123|
|Publication date||Jun 2, 2009|
|Filing date||Nov 2, 2006|
|Priority date||Jul 1, 1999|
|Also published as||DE60035742D1, DE60035742T2, EP1065797A1, EP1065797B1, US6813308|
|Publication number||11593123, 593123, US RE40716 E1, US RE40716E1, US-E1-RE40716, USRE40716 E1, USRE40716E1|
|Inventors||Laurent Ouvry, Didier Varreau, Didier Lattard, Sebastien Leveque|
|Original Assignee||Commissariat A L'energie Atomique|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (10), Non-Patent Citations (1), Classifications (15), Legal Events (2)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The present invention relates to a CDMA (code division multiple access) receiver with parallel interference suppression and optimized synchronization.
More generally, the invention relates to direct sequence spread spectrum (DSSS) digital transmission.
The invention has applications in radiocommunications systems with mobiles, in wireless local area networks (WLAN), in wireless local loops (WLL), in cable television and online multimedia services, in integrated home systems and electronic funds transfer, etc.
Direct sequence spread spectrum consists of modulating each symbol of a digital signal by a binary pseudorandom sequence. Such a sequence consists of N pulses or chips, whose duration Tc is equal to Ts/N. The modulated signal has a spectrum spread over a range N times wider than that of the original signal. On reception, demodulation consists of correlating the signal with the sequence used on transmission making it possible to once again find the information linked with the starting symbol.
This procedure has numerous advantages:
The direct sequence spread spectrum modulation method has been extensively described in the specialist literature and reference can e.g. be made to the following:
The first circuit of said receiver (correlation means 10), no matter whether it is a sliding correlator or a matched filter, plays an important part which can be defined with the aid of
A sliding correlator (
The matched filter (
Viewed from the output of the undersampler 28, said two architectures are equivalent. However, viewed from the input of the undersampler 28, they are different, because they do not deliver the same signal, as is revealed by
These drawings show that the sliding correlator needs an information linked with the timing of the symbols, so-called symbol clock signal and designated Hs to enable the local replica of the sequence to be aligned with the sequence modulating the symbols received, otherwise the demodulation of the symbols is impossible (case of FIG. 6). The matched filter does not require this information. Thus, what firstly differentiates a sliding correlator structure and a matched filter structure is that the former needs an external synchronization information.
A matched filter makes it possible to recover the symbol clock, e.g. by a recursive detection of the correlation peak on a window of N points (FIG. 4). It is also possible to recover the symbol clock with the aid of a sliding correlator, but this is more complex. There is a need for a stepwise modification of the phase of the local replica of the sequence until the output of the sliding correlator corresponds to an energy maximum and consequently to a correlation peak (case of FIG. 5).
Although both these structures make it possible to find the symbol clock again, they do not do so at the same speed. The symbol clock recovery operation lasts a maximum of N symbol periods, i.e. NTs with a sliding correlator, whereas it only requires a single symbol period Ts with a matched filter.
Thus, the advantage of the matched filter is obvious with respect to the symbol clock signal acquisition speed. Its disadvantage is its operational complexity, because its installation in the form of a finite pulse response digital filter (operating at the speed of the chips multiplied by the number of samples) requires N multiplications and N additions for each sample. Thus, its structural complexity is linked with its operating complexity.
The sliding correlator only performs one multiplication and one addition for each new sample. Thus, although it is relatively poorly adapted to the clock recovery, it is very advantageous from the operating complexity standpoint.
The CDMA method can be of two types. If the different transmitters of users do not have a common time reference the system is said to be asynchronous, because the starts of the symbols of each user arrive at the receiver at different times. It is also possible to proceed in such a way that the starts of the symbols received from the different users (modulo period Ts of a symbol). The system is then said to be synchronous. Asynchronous systems have the major advantage of not requiring an external synchronization signal, unlike in synchronous systems, but this is to the detriment of more serious constraints with respect to the spread sequence properties.
Thus, in an asynchronous CDMA system, the sequences have random relative phases at the reception level. Thus, a good separation of the signals assumes that the intercorrelations between sequences are small, no matter what the relative phases between the sequences.
If gi(t) and gk(t) are used for designating two pseudorandom sequences allocated to users i and k, it is possible to define a coefficient μi,k translating the correlation between these two sequences. This coefficient is equal to the mean, on the duration Ts of a symbol, of the product of the sequences, i.e.:
This coefficient represents an autocorrelation if i=k and an inter-correction if i≠k.
The signal at the output of the correlator corresponding to the user of rank k (i.e. following the undersampler 28 of
where Ak is the amplitude of the signal of the user of rank k, gk(t) the pseudorandom sequence of said same user, di the transmitted data and n(t) an additive, Gaussian, white noise. In this expression, i ranges from 0 to K−1, K being the total number of users, but without assuming the value k of the user in question.
The first term, i.e. Akdk makes it possible to again find the data item dk, the second term corresponding to a correlation with the signals corresponding to other users. This term is called multiple access interference or MAI.
The existence of this multiple access interference leads to a non-negligible consequence with respect to the capacity of the transmission system, i.e. the number of acceptable simultaneous users and on the performance characteristics of the system.
Much research has been carried out with the aim of reducing this interference phenomenon and reference can be made to the following:
The latter research has more particularly involved “sub-optimum” receiver structures which, unlike an optimum structure, effect a good compromise between performance characteristics and operating complexity. Among these, interest is attached to parallel interference suppression structures and details of these are given below.
A parallel interference suppression receiver generally uses:
Such a procedure is described in the article by R. M. BUEHRER et al. entitled “Analysis of DS-CDMA Parallel Interference Cancellation with Phase and Timing Erros”, published in IEEE Journal of Selected Areas in Communications, vol. 14, No. 8, Oct. 1996, pp 1522-1535. The corresponding receiver is illustrated in the attached
In turn, the signals r1 1, r2 1, r3 1 can be processed in a second interference suppression stage and so on up to the ith interference suppression stage ESIi. Thus, freed from at least part of the multiple access noise, the signals r1 1, r2 1, r3 1 permit a better estimate of the interference to be subtracted from the signal received r(t). In the stage of rank i, i.e. ESIi, are only shown the subtractors with the signals r1 i, r2 i and r3 i.
The receiver comprises a final stage or decision stage ED, with three channels containing correlation means 141, 142, 143 and three decision circuits 151, 152, 153 delivering the data d1, d2, d3.
In each stage there are synchronization means for the control of the different circuits. Thus, the first stage ESI1 contains synchronizing circuits 131, 132, 133 controlling the correlation means 101, 102, 103 and estimation means 111, 112, 113. In the final stage ED there are synchronizing means 161, 162, 163 controlling the correlation means 141, 142, 143 and decision means 151, 152, 153.
In general terms, for constructing a multiple access interference correction signal, there is a need for three informations:
All these informations are calculated or recorded for each stage, for the control of said stage and independently of what takes place in the other stages.
Although this arrangement makes it possible to obtain a correct operation of the receiver it is still relatively complex. The invention obviates this disadvantage by proposing a simpler structure, which also makes it possible to turn to the best account the performance characteristics of the correlation means.
Use is made of a system with direct sequence spread spectrum and several optionally asynchronous transmitters. At the parallel interference suppression receiver, the correlation peak or peaks corresponding to the different propagation paths of the signal of user k are placed precisely at the same locations in the symbol window, no matter what the considered suppression stage for a given symbol. Thus, the signal received contains the replicas of the signal transmitted by the user k associated with the propagation paths, at a fixed location for a given symbol in the symbol window. The time positions are estimated in the synchronization means and can doubtless be considered as different between individual stages, because during the suppression stages interference is progressively removed from the signal. However, the information received does not move relative to the window of the considered symbol. Thus, a single synchronization signal per path is sufficient and not one per path and per stage.
Thus, the applicant has decided to use the synchronization signal or signals calculated in the final receiver stage, said signals being less error-tainted, for controlling all the interference suppression stages for each user.
Thus, the invention renders unnecessary complex calculations for investigating clock signals at all the first stages and consequently considerably reduces the operational complexity of the receiver. This complexity can be further reduced by the use of sliding correlators in the first stages and matched filters in the final stage. As explained hereinbefore, the matched filter makes it possible to acquire the synchronization in a single symbol period, whilst the use of sliding correaltors makes it possible to reduce the operational complexity without deteriorating said acquisition time.
More specifically, the present invention relates to a receiver for multiplex access transmission with distribution by codes and parallel multiple access interference suppression comprising:
Thus, preferably, the K synchronization signals also control the K correlation means.
Preferably, the K correlation means of the K channels of the final stage are constituted by K matched filters with K pseudorandom sequences and the K correlation means of the K channels of each interference suppression stage are constituted by K sliding correlators.
The correlations means 141, 142, 143 of the final stage are advantageously matched filters making it possible to acquire the synchronization in a single symbol period, whereas the correlation means 101, 102, 103 of the interference suppression stages are sliding correlators, which reduces the complexity without any deterioration to the acquisition time.
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|1||Buehrer, R.M., et al., "Analysis of DS-CDMA Parallel Interference Cancellation with Phase and Timing Errors," IEEE Jour. on Sel. Areas of Communications, vol. 14, No. 8, pp. 1522-1535, Oct. 1996.|
|U.S. Classification||375/147, 375/354, 375/152, 375/E01.031, 375/346, 375/148, 375/150|
|International Classification||H04B1/707, H04B1/00|
|Cooperative Classification||H04B1/7093, H04B1/7095, H04B1/71075|
|European Classification||H04B1/7107B, H04B1/7093, H04B1/7095|
|Apr 24, 2012||FPAY||Fee payment|
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|Apr 25, 2016||FPAY||Fee payment|
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