|Publication number||USRE40965 E1|
|Application number||US 11/065,718|
|Publication date||Nov 10, 2009|
|Filing date||Feb 24, 2005|
|Priority date||Jan 26, 2001|
|Also published as||US6524949, US20020102841|
|Publication number||065718, 11065718, US RE40965 E1, US RE40965E1, US-E1-RE40965, USRE40965 E1, USRE40965E1|
|Inventors||Shuichi Kaneko, Hironori Aoki, Akio Iwabuchi|
|Original Assignee||Sanken Electric Co., Ltd.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (4), Classifications (11), Legal Events (2)|
|External Links: USPTO, USPTO Assignment, Espacenet|
The present invention relates to a method of fabricating contact electrodes in semiconductor devices such as integrated circuits, transistors, and diodes. The method of this invention is particularly well applicable to the fabrication of contact electrodes in power-handling semiconductor devices in which the insulating films to be penetrated are generally thicker than in other semiconductor devices.
As semiconductor devices have grown finer in design in recent years, so have become less in size the contact holes that must be formed in and through their insulating films for creation of electrodes. In addition to that, at least as far as power-handling semiconductor devices are concerned, the insulating films in which are to be formed the contact holes remain relatively thick in order to withstand high voltages. The so-called aspect ratio of the contact holes, the ratio of hole depth to diameter, have become all the more higher in this type of semiconductor devices, making it proportionately more difficult to fill metal, such as aluminum, into these holes. An incomplete packing of the contact holes with metal is of course undesirable from the standpoint of reduction of contact resistance to a minimum.
A conventional remedy to this problem is what is known as the contact reflow process, which starts with the creation of a hole in a film of electrically insulating material on a semiconductor substrate, as by the more conventional method of photolithography or etching. The insulating film may be of either boron-phosphor-silicate glass (BSPG) or phosphor-silicate glass (PSG). Anisotropic etching is considered desirable for creation of a hole that extends approximately perpendicular to the substrate surface.
The next step is the heating of the insulating film to such a temperature that it undergoes deformation, or reflow, with the consequent flaring of the hole as it extends away from the substrate surface, or tapering thereof as it extends toward the substrate surface. Even though the insulating film may be relatively thick, and the original hole correspondingly high in aspect ratio, the tapering contact hole thus formed is bound to accept metal far more easily and more thoroughly than if it were constant in diameter, as the metal is introduced as by vacuum deposition. The result is an improvement in the so-called step coverage of the electrode.
The contact reflow process has its own shortcoming, however. Upon heating, as above, of the insulating film to a reflowing temperature following the creation of a hole therein, there occurs the so-called outward diffusion of such substances as phosphor and boron contained therein. These substances, especially boron, find their way onto the substrate surface exposed through the contact hole thereby preventing favorable electrical contact of the electrode with the substrate.
An obvious solution to this weakness of the contact reflow process might seem to create, as by thermal oxidation, a silicon oxide film on the substrate surface forming the bottom of the contact hole, preparatory to the heat treatment of the insulating film. This solution would be impractical because the noted outward diffusion of boron and the like would occur during creation of the silicon oxide film, to such an extent that the substrate surface would not be satisfactorily kept from contamination by the impurities.
The present invention represents an improvement of the contact reflow method, aiming specifically at preventing the outward diffusion of the impurities contained in the insulating film or films and reducing the contact resistance to an absolute minimum.
The invention also seeks to attain the first recited object in the simplest possible manner, without unnecessarily adding to the steps of electrode fabrication.
Briefly, the present invention may be summarized as a method of fabricating a contact electrode in a semiconductor device. There is first formed on a surface of a semiconductor substrate a lamination of a first and a second insulating film of different materials, possibly with any required conductor layer interposed therebetween. Then a first hole is etched at least in the second insulating film which overlies the first insulating film, thereby leaving the substrate surface covered by at least part of the thickness dimension of the first insulating film. Then the second insulating film is heated to a reflowing temperature such that the first hole in the second insulating film is so reshaped as to flare as it extends away from the first insulating film. Then a second hole is etched in the first insulating film through the first hole in the second insulating film, with consequent exposure of the substrate surface at the bottom of the second hole. Then a contact electrode is formed by filling the first and the second hole with an electroconductive material.
It is to be noted that two insulating films of different materials are formed on the semiconductor substrate according to the invention. A hole is first etched in the overlying second insulating film, leaving the substrate surface covered by the first insulating film during the subsequent reflow treatment of the second insulating film. This first hole is therefore deformed into a tapering shape without the least possibility of the substrate surface being contaminated by the impurities dispersed from the second insulating film. Fabricated following the subsequent creation of the second hole in the first insulating film through the first hole, the contact electrode is predestined to make low-resistance contact with the substrate surface forming the bottom of the second hole.
For successfully creating the first hole so as to leave the substrate surface covered by at least part of the thickness dimension of the first insulating film, it is recommended that materials for the two insulating films and an etchant for use be so chosen in relation to one another that the first insulating film is slower to be etched than the second. With the first insulating film thus left shielding the substrate surface by taking advantage of the difference between the etching rates of the two insulating films, the contamination of the substrate surface will be prevented without unnecessarily complicating the process of electrode fabrication.
It will also be appreciated that the tapering shape of the first hole remains intact upon creation of the second hole down to the substrate surface. Thus the invention saves the advantages of the prior art reflow process.
The above and other objects, features and advantages of this invention will become more apparent, and the invention itself will best be understood, from a study of the following detailed description and appended claims, with reference had to the attached drawings a preferred mode of carrying out the invention.
There may be first prepared a semiconductor substrate 10,
Then, as shown in
Then the second insulating film 12 is masked with an etchant resist 13,
A closer study of
Then, following the removal of the etchant resist 13, the second insulating film 12 is heated to a temperature range of approximately 900°-1000° C. Thereupon, as has been set forth in conjunction with the conventional contact reflow process, the second insulating film 12 of BSPG will be thermally caused to reflow with the consequent reshaping of the constant-diameter hole 14 into a hole 14a,
Then a hole 15,
Next comes the step of the creation of a metal-made contact electrode 17,
The advantages gained by the above-described exemplary method of this invention may be recapitulated as follows:
Notwithstanding the foregoing detailed disclosure it is not desired that the present invention be limited by the exact showing of the drawings or the description thereof. The following is a brief list of possible modifications of the illustrated exemplary method:
All these and other changes and adaptations of the illustrated method are intended in the foregoing disclosure. It is therefore appropriate that the invention be construed broadly and in a manner consistent with the fair meaning or proper scope of the subjoined claims.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US4807016||Nov 20, 1987||Feb 21, 1989||Texas Instruments Incorporated||Dry etch of phosphosilicate glass with selectivity to undoped oxide|
|US5286677||May 7, 1993||Feb 15, 1994||Industrial Technology Research Institute||Method for etching improved contact openings to peripheral circuit regions of a dram integrated circuit|
|US5759869||Jun 7, 1995||Jun 2, 1998||Sgs-Thomson Microelectronics, Inc.||Method to imporve metal step coverage by contact reflow|
|US6524949||Oct 29, 2001||Feb 25, 2003||Sanken Electric Co., Ltd.||Method of forming low-resistance contact electrodes in semiconductor devices|
|U.S. Classification||438/640, 438/624, 438/632|
|International Classification||H01L21/4763, H01L21/308, H01L21/768, H01L21/302, H01L21/28, H01L21/3065|
|Jul 28, 2010||FPAY||Fee payment|
Year of fee payment: 8
|Jul 30, 2014||FPAY||Fee payment|
Year of fee payment: 12