|Publication number||USRE41697 E1|
|Application number||US 11/235,648|
|Publication date||Sep 14, 2010|
|Filing date||Sep 26, 2005|
|Priority date||Sep 17, 2002|
|Also published as||US6645851|
|Publication number||11235648, 235648, US RE41697 E1, US RE41697E1, US-E1-RE41697, USRE41697 E1, USRE41697E1|
|Inventors||Chia-Tung Ho, Feng-Jia Shih, Jieh-Jang Chen, Ching-sen Kuo, Shih-Chi Fu, Gwo-Yuh Shiau, Chia-Shiung Tsai|
|Original Assignee||Taiwan Semiconductor Manufacturing Company|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (14), Classifications (26), Legal Events (4)|
|External Links: USPTO, USPTO Assignment, Espacenet|
Notice: More than one reissue application has been filed for the reissue of U.S. Pat. No. 6,645,851. The reissue applications are application Ser. No. 11/235,648 (the current application) and divisional patent application Ser. No. 12/099,683.
The invention relates to the field of fabricating semiconductor devices and other electronic devices and in particular to a planarization method used for the formation of semiconductor devices.
The manufacture of integrated circuits in a semiconductor device involves the sequential deposition of layers in which patterns are formed. A pattern is first formed by a lithography process in a photoresist layer and is subsequently transferred into one or more layers in a substrate by an etching method. Alternately, the photoresist pattern can serve as a mask for an ion implant step. In either case, an important requirement of the photoresist layer is forming a planar surface in order to afford a large process latitude for the patterning step.
Often the substrate upon which the photoresist is spin coated is not planar because it may be comprised of a pattern containing features such as lines that protrude above the surface of the substrate. Other substrates may have a largely level surface except for contact holes or trenches that are etched below the surface. The topography of non-planar substrates can involve thickness variations as large as 1 micron or more. However, even substrate thickness differences of only 0.1 to 0.2 microns can be significant when considering that photoresist film thickness is becoming thinner as feature size decreases. For advanced technology nodes where the critical dimension of a line width or space width is less than 200 nm, most photoresist layers are in the range of about 2000 to 8000 Angstroms (0.2 to 0.8 micron) thick. A photoresist composition normally includes an organic solvent, a photosensitive compound, and a polymer that has a low molecular weight which flows easily and tends to planarize readily on relatively smooth surfaces. However, when the topography includes steps with a height that is more than about 10 to 20% of the photoresist film thickness, then planarization of the photoresist film is difficult.
The photoresist film is exposed with radiation from an exposure source such as an excimer laser or a broadband Hg/Xe lamp that passes through a mask containing the device pattern to be reproduced on the substrate. The mask has a patterned opaque coating such as chrome on a transparent substrate like quartz. A good lithography process is defined as one that has a manufacturable process window in which there is a wide dose latitude and focus latitude for printing the pattern in the photoresist film. Generally, a depth of focus (DOF) of about 0.4 to 1 micron and a dose latitude of at least 10 to 20% is desirable for maintaining a printed feature size within ±10% of a targeted value. One can appreciate that if the photoresist layer has a thickness variation of 0.1 micron or more, then a significant portion of the DOF budget has been consumed by material aspects and not by the exposure process itself. Typically, the spin coating process is optimized so that the photoresist thickness variation is minimized to a value of less than 10 Angstroms across the wafer. This is accomplished on planar substrates by varying the spin speed during the coating process and by wetting the substrate with a solvent prior to applying the photoresist solution.
The relationship of photoresist thickness to the radiation dose or energy required to print a pattern in the film is provided in FIG. 1. The plot of thickness vs. dose forms a sinusoidal curve 5 that has minima 1, 3 and maxima 2, 4. This “swing” curve has an amplitude A between a minimum and a maximum energy and a periodicity B defined as the distance (thickness) between two adjacent minimum points or two adjacent maximum points on the curve 5. The magnitude of periodicity B is related to the wavelength of the exposing radiation. The amplitude A is calculated by dividing the difference between the energy for maximum point 2 (E2) and the energy for minimum point 1 (E1) by the average of E1 and E2 which is (E2−E1)/(E1+E2/2) and this value can be as large as 0.3 which is a swing of 30% in dose.
The swing effect is caused because radiation that passes through the photoresist is partially reflected off the underlying layer and can either constructively or destructively interfere with radiation making a first pass through the photoresist. The extent of constructive or destructive interference depends upon the thickness of the film and the wavelength of the radiation. The swing amplitude has a detrimental effect on the patterning process, especially if it is more than a few % of the average dose. Consider the condition in
In some situations, an anti-reflective coating (ARC) is applied to the substrate prior to the photoresist coating in order to control reflectivity during the photoresist exposure step and enable a larger process latitude by reducing the swing effect. The ARC which can be an organic or inorganic material is normally much thinner than the photoresist and is most effective on relatively flat substrates. While some organic ARCs have been developed for spin coating over features such as contact holes, there are none available that can completely planarize a surface with topography variations of about 0.1 microns or larger.
Planarization methods have been proposed for different applications in prior art. In U.S. Pat. No. 5,077,234, a process is provided for filling STI trenches of varying widths. The method requires three photoresist layers. A first photoresist is patterned to fill only large trenches of greater than 30 microns in width. This photoresist plug is then hardened by a combination of heating to 200° C. and UV exposure. A second photoresist is coated and baked to >150° C. and then etched back until the layer is removed over active regions. Then a third photoresist layer is coated and etched back to form a planar layer.
In U.S. Pat. No. 6,008,105, a process is described for planarizing a depression formed in an insulating layer that is deposited over interconnect lines. A mask pattern is used to selectively leave photoresist that fills the depression. The photoresist is baked at 150° C. to remove solvent and then cured by UV radiation. A second photoresist is coated on the substrate and etched back to form a planar surface. This technique requires a new mask to be built for each pattern of interconnect lines and can be expensive since several metal layers are present in a device.
U.S. Pat. No. 5,618,751 describes a method of forming a trench capacitor that requires a photoresist to be coated over a trench that is <0.5 microns wide. Since the opening is small, the photoresist does not fill the trench and must be heated above its softening point so that it flows into the trench. The photoresist is preferably exposed with an electron beam source to avoid diffraction effects and formation of standing waves on the sidewalls of the trench. The photoresist is developed to form a recessed layer within the trench that serves as an etch stop for etching an adjacent diffusion source layer to a prescribed depth. A point is made that the electron beam exposure yields a more planar photoresist surface within the trench than photolithography with Deep UV (248 nm), i-line (365 nm) or mid UV (435 nm) radiation sources. However, this patent does not mention a solution for forming a planar photoresist over a substrate that has both isolated and dense trench patterns.
Other background art found in U.S. Pat. No. 6,218,196 deals with a problem of etching a pattern that contains both dense and isolated lines. The space between dense lines etches slower than the region along isolated lines and creates a reactive ion etch (RIE) lag. An apparatus and etching method are provided that includes a deposition gas such as CHF3 that forms a protective layer on the photoresist sidewalls to prevent notching and an etching gas mixture of Cl2 and BCl3. The reactive products from CHF3 and Cl− excessively react at isolated lines to produce a higher deposition rate that decreases the etch rate difference between isolated and dense lines.
Besides the planarization requirement cited previously for dielectric layers on interconnect lines, for filling STI trenches, and for forming trench capacitors, another application shown in
An object of the present invention is to provide a photoresist planarization process that is low cost and can be readily implemented in a manufacturing environment.
A further objective of the present invention is to provide a photoresist planarization method that can be used in a dual damascene process where trenches are patterned above both isolated and dense via holes in the same pattern.
A still further objective of the present invention is to provide a planarization method that can be applied to fabricating metal-insulator-metal capacitors in which contact holes having regions of low and high duty ratios exist in the same pattern.
According to one embodiment, these objectives are accomplished by providing a substrate that has a patterned dielectric layer comprised of both isolated and dense via holes formed thereon. A first photoresist layer is spin coated on the dielectric layer and baked at a high enough temperature so that the photoresist reflows into the holes and thereby forms an uneven thickness above the dielectric layer. The photoresist is blanket exposed without a mask and is developed to remove all photoresist above the dielectric layer and form a recessed layer of photoresist within the holes. A high temperature bake of 250° C. is performed to remove any remaining solvent in the photoresist and to harden the film. Preferably, the photoresist is comprised of a Novolac resin and a diazonaphthoquionone photoactive compound which form a crosslinked network that becomes impervious to organic materials or solvents that are coated on it. Then a second photoresist is spin coated on the dielectric layer having holes containing the recessed hardened photoresist to form a planar layer that can be controllably patterned with trenches that are aligned above the contact holes. Conventional processing is then followed to form metal interconnects.
In a second embodiment that relates to metal-insulator-metal (MIM) capacitor technology, a substrate is provided with a dielectric layer having contact hole regions with different duty ratios in which a bottom electrode such as TiN has been deposited. A first photoresist layer is spin coated and baked at a high enough temperature so that the photoresist reflows into the holes and thereby forms an uneven thickness above the metal layer. The photoresist is blanket exposed without a mask and developed to remove all photoresist above the metal layer except for a recessed layer of photoresist within the holes. A high temperature bake of 250° C. is performed to remove any remaining solvent and to harden the film. Preferably, the photoresist includes a Novolac resin and a diazonaphthoquionone photoactive compound which form a crosslinked network that becomes impervious to organic materials or solvents that are coated on it. Then a second photoresist is spin coated on the metal layer and covers the holes containing the recessed hardened photoresist to form a planar layer. The photoresist is then etched back until it forms a recessed layer within the holes. A second etch is then performed to etch back the TiN layer until it is about coplanar with the recessed photoresist layer. The remaining photoresist is then removed by a plasma ashing process and conventional processing is followed to complete the MIM capacitor.
Preferred embodiments of the present invention will be described with reference to the accompanying drawings. The description of the fabrication of a dual damascene structure and a MIM capacitor are provided as an example and not as a limitation as to the scope of the present invention. For example, the embodiments refer to a method of planarizing a photoresist over contact hole patterns but the invention is equally effective in planarizing patterns containing other features such as trenches.
The first embodiment is illustrated in
A dielectric layer 12 is deposited on etch stop 11 and is patterned by conventional means to generate via holes that include an isolated hole 13a and dense holes 13b-13e. Dielectric layer 12 is selected from a group including SiO2, carbon doped SiO2, fluorosilicate glass, polysilsesquioxanes, polyarylethers, polyimides, and other low k dielectric materials, and has a thickness in the range of about 2000 to 20000 Angstroms. Via holes 13a-13e can be formed with various duty ratios depending upon the device pattern. A duty ratio is defined as the space occupied by the via holes divided by the total area of the pattern. The duty ratio approaches 0 for patterns containing only isolated holes and approaches 0.5 for a densely populated hole pattern.
The present invention is most effective for patterns having both low duty ratio and high duty ratio regions.
A photoresist solution in an organic solvent is spin coated on dielectric layer 12 and partially dries while spinning but may not completely fill holes 13a-13e. When the substrate 10 is baked at about 90° C. to 130° C. for up to 2 minutes, the partially dried photoresist layer 14 reflows such that it completely fills via holes 13a-13e. Although photoresist layer 14 has a relatively thick film in the range of 5000 to 35000 Angstroms, the thickness in a region over holes 13b-13e is less than the thickness in a region over isolated hole 13a by a distance D1 shown in
Photoresist 14 is preferably a positive tone composition in which the solubility of exposed regions changes. When the exposed pattern is treated with a developer that is usually an aqueous base solution, then the soluble exposed regions are washed away while any unexposed regions remain insoluble and are not removed. Different types of positive tone compositions are available and have been developed for a particular exposure wavelength such as Deep UV (248 nm), i-line (365 nm), or Mid UV (435 nm).
Preferably, the photoresist 14 is comprised of a Novolac resin and a diazonaphthoquinone (DNQ) photoactive compound which is useful for exposing wavelengths between about 300 and 500 nm. The Novolac resin that comprises a majority of photoresist layer 14 generally has a glass transition temperature (Tg) between about 90° C. and 130° C. that enables the photoresist to reflow into holes 13a-13e following spin coating and baking at or slightly above the Tg. The DNQ compound and traces of organic solvent in the resin matrix tend to lower the melt temperature of layer 14 below the glass transition temperature of the Novolac resin.
The blanket exposure dose for layer 14 can be delivered by a scanner or stepper exposure system or by a lower cost method involving a flood exposure tool that is available from suppliers like Fusion Systems. A broadband Hg/Xe lamp exposes a substrate on a rotating stage during flood exposure with a range of wavelengths from about 300 nm to about 500 nm. A filter may be added to narrow the wavelength range that exposes the substrate. Alignment capability is not necessary for this step.
Photoresist 14a is then thermally hardened by heating the substrate 10 on a hot plate at about 250° C. for about 2 minutes. A transformed layer 14b results as shown in
Layer 14b is likely to have a lower thickness in holes 13a-13e than layer 14a since the hardening step compacts the matrix and removes any solvents or water. The depth to which hardened layer 14b is recessed in holes 13a-13e can vary. For a minimum depth, the hardened layer 14b can be coplanar with the top of hole 13a. A maximum depth in holes 13b-13e as indicated by H in
A second photoresist is then spin coated on dielectric layer 12 and baked in a range from about 90° C. to 150° C. to form a photoresist layer 15 having a thickness between about 5000 and 35000 Angstroms as shown in FIG. 5. Typically, a solvent like propylene glycol monomethylether acetate (PGMEA) or ethyl lactate is applied as the first step in the photoresist coating process to enable a more uniform layer 15 to be produced. This solvent does not interact with layer 14b because of the previous hardening step. Layer 15 also fills holes 13a-13e. A key feature is that layer 15 is essentially planarized because of the process outlined in
Photoresist layer 15 is preferably a positive tone photoresist and is patternwise exposed through a mask and developed to form trench openings 16a, 16b, 16c shown in FIG. 6. The exposure wavelength is selected based on the width of trench openings 16a-16c. If the width is larger than about 300 nm, then an i-line exposure is generally preferred. For a width in the range of about 130 nm to about 300 nm, then a Deep UV exposure is typically employed. For sub-130 nm openings, a sub-200 nm exposure wavelength such as a 193 nm or 157 nm wavelength from an excimer laser source is preferred. Each of these wavelengths requires a photoresist composition that has been tuned for that wavelength. It should also be noted that a thinner photoresist 15 thickness is needed as the width of trench openings decreases in order to maintain an adequate process window for the patterning step.
The unexposed portions of photoresist layer 15 serve as an etch mask during a plasma etch to transfer the trench pattern partially through dielectric layer 12. The trenches 16a-16c are aligned above via holes 13a-13e. The alignment is not limited to the example shown in
Photoresist layers 15 and 14b are then removed by a plasma ash process that normally involves oxygen. An additional cleaning step may be necessary to remove any traces of photoresist residue before proceeding to fill the trenches and via holes with a conductive material. A barrier metal liner 17 as shown in
The method shown in
A second embodiment of the present invention is set forth in
A conducting material that is preferably TiN or TIN/W is then deposited by a CVD technique and forms a conformal layer 23 on the surface of oxide 21 and within the contact holes 22a-22e. The thickness of metal layer 23 which forms the bottom electrode of the MIM capacitor is between 100 and 500 Angstroms. Other suitable conducting materials such as TaN and WN can also be used to form metal layer 23.
A photoresist solution in an organic solvent is spin coated on metal layer 23 and partially dries while spinning but may not completely fill holes 22a-22e. When the substrate 20 is baked at about 90° C. to 130° C. for up to 2 minutes, the partially dried photoresist layer 24 reflows such that it completely fills via holes 22a-22e. Although photoresist layer 24 is a relatively thick film in the range of about 5000 to 35000 Angstroms, the thickness in a region over holes 22b-22e is less than the thickness in a region over hole 22a by a distance D2 shown in
Photoresist 24 is preferably a positive tone composition in which the exposed regions become soluble in a developer. When the exposed pattern is treated with a developer that is generally an aqueous base solution, then the soluble exposed regions are washed away while any unexposed regions remain insoluble and are not removed. Different types of positive tone compositions are available and have been developed for a particular exposure wavelength such as Deep UV (248 nm), i-line (365 nm), or Mid UV (435 nm).
Preferably, the photoresist 24 is comprised of a Novolac resin and a diazonaphthoquinone (DNQ) photoactive compound which is useful for exposing wavelengths between about 300 and 500 nm. The Novolac resin that comprises a majority of photoresist layer 24 generally has a glass transition temperature (Tg) between about 90° C. and 130° C. that enables the photoresist to reflow into holes 22a-22e following spin coating and baking at or slightly above the Tg. The DNQ compound and traces of organic solvent tend to lower the melt temperature of layer 24 below the glass transition temperature of the Novolac resin.
The blanket exposure dose for layer 24 can be delivered by a scanner or stepper exposure system or by a lower cost method involving a flood exposure tool that is available from suppliers like Fusion Systems. A broadband Hg/Xe lamp exposes a substrate on a rotating stage during flood exposure with a range of wavelengths from about 300 nm to about 500 nm. A filter may be added to narrow the wavelength range that exposes the substrate. Alignment capability is not necessary for this step.
Photoresist 24a is then thermally hardened by heating the substrate 20 on a hot plate at about 250° C. for about 2 minutes. A transformed layer 24b results as shown in
Layer 24b is likely to have a lower thickness in holes 22a-22e than layer 24a since the hardening step compacts the layer and removes any solvents or water. The depth to which hardened layer 24b is recessed in holes 22a-22e can vary. For a minimum depth, the layer 24b can be coplanar with the top of hole 22a. A maximum depth in holes 22b-22e as indicated by H2 in
A second photoresist is then spin coated on conducting layer 23 and baked in a range from about 90° C. to 150° C. to form a photoresist layer 25 having a thickness between about 5000 and 35000 Angstroms as shown in FIG. 10. Normally, a solvent like propylene glycol monomethylether acetate (PGMEA) or ethyl lactate is applied as the first step in the photoresist coating process to enable a more uniform layer 25 to be produced. This solvent does not interact with hardened layer 24b because of the previous hardening step. Layer 25 also fills the holes 22a-22e. A key feature is that layer 25 is essentially planarized because of the process outlined in
Photoresist layer 25 is not exposed in this process and can be any photoresist composition or even a polymer solution that is capable of forming uniform coatings of the required thickness mentioned previously. Photoresist 25 preferably has an etch rate similar to hardened layer 24. Photoresist 25 is subjected to an etch back step in which a plasma etch preferably involving an oxygen gas is performed to remove all of layer 25 above metal layer 23 and in contact holes 22a-22e. The etch also removes some of hardened layer 24b to give a recessed depth H3 in hole 22a and H4 in holes 22b-22e as shown in FIG. 11. Conditions for the etch are a O2 flow rate of about 90 standard cubic centimeters per minute (sccm), an argon flow rate of about 20 sccm, a chamber pressure of 8 mTorr, a RF power of about 1200 Watts for a period of 120 seconds.
The desired magnitude of H3 and H4 are in a range of about 500 to 3000 Angstroms. The benefit of the method of the second embodiment is apparent when comparing experimental results to a prior art method. For example, when photoresist 24 with a thickness variation D2 is etched back by the process similar to the one described in the previous paragraph, then a recess depth in holes in low duty regions is about 3690 Angstroms and the recessed depth in holes in high duty regions is about 5600 Angstroms. The 1910 Angstrom difference is unacceptably large for this device and will result in a MIM capacitor with a low performance. On the other hand, when the process illustrated by
Optionally, prior art methods may involve several cycles of coating a photoresist layer 24 and etching it back before D2 is reduced to an acceptable level. However, this technique is time consuming and costly in terms of material and tool usage and increased substrate handling is likely to cause more defects. Therefore, the method described for
The metal layer 23 is then plasma typically etched by a process comprised of a 50 to 110 sccm flow rate of Cl2, a chamber pressure of 5 to 12 mTorr, and a RF power of 700 to 1500 Watts. This step lowers the metal layer 23 to a level that is about coplanar with the hardened layer 24b in holes 22a-22e. The importance of achieving a fairly even depth of H3 and H4 in
The MIM capacitor is then completed by conventional steps of depositing an insulator layer 26 and a top electrode layer 27 as depicted in
The method of the second embodiment can be readily implemented in a manufacturing environment since existing tools and materials are utilized. The method is independent of contact hole design and is effective for patterns containing contact holes with different duty ratios. The coating, exposing, and developing of photoresist 24 can all be performed in one flow or job sequence and is especially low cost if the blanket exposure is done with a relatively inexpensive flood exposure tool rather than a more expensive scanner or stepper.
While this invention has been particularly shown and described with reference to the preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the spirit and scope of this invention.
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|U.S. Classification||438/626, 438/623, 438/633, 216/47, 216/48|
|International Classification||H01L21/768, H01L21/027, G03F7/00, H01L21/311, G03F7/16, G03F7/09, H01L21/3213, H01L21/4763|
|Cooperative Classification||H01L21/0273, H01L21/32139, H01L21/76808, G03F7/09, G03F7/0035, H01L21/31144, G03F7/16|
|European Classification||H01L21/768B2D2, H01L21/311D, G03F7/16, H01L21/3213D, G03F7/00R, H01L21/027B6|
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