|Publication number||USRE41738 E1|
|Application number||US 12/290,773|
|Publication date||Sep 21, 2010|
|Filing date||Nov 3, 2008|
|Priority date||Mar 7, 2006|
|Also published as||CN101454954A, CN101454954B, EP1999827A2, EP1999827A4, US7359421, US20070223546, WO2007103527A2, WO2007103527A3|
|Publication number||12290773, 290773, US RE41738 E1, US RE41738E1, US-E1-RE41738, USRE41738 E1, USRE41738E1|
|Inventors||Mary K. Brenner, Klein L. Johnson|
|Original Assignee||Mytek, Llc|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (18), Referenced by (2), Classifications (20), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
This application claims the benefit of Provisional Patent Application No. 60/780,267 filed Mar. 7, 2006 for “RED LIGHT LASER”.
The present invention relates to Vertical Cavity Surface Emitting Laser (VCSEL) chips and subassemblies.
VCSELs are an important optical source for fiber optic data communication systems. Most of the devices that have been used in these systems emit light in the 830 to 860 nm wavelength range. However, VCSELs have been fabricated that have demonstrated emission at wavelengths equal to or in the vicinity of the following wavelength values: 660 nm, 780 nm, 850 nm, 980 nm, 1310 nm, and 1550 nm.
Red light emission VCSELs (˜660 nm) are of considerable interest for applications in which the emission light capable of being seen by the human eye is valued. For instance, photoelectric sensors attuned to detecting such emission light might be used to sense the presence/absence, distance or other attribute of objects illuminated by that light. The ability of an observer to see the emitted beam for sensor alignment purposes is advantageous. A bar code scanner would be a special case of such a sensor, and users prefer the use light thereby of a visible wavelength so that they can more easily aim the light beam at the bar code. Chemical, biological, or medical sensors can take advantage of the absorption or scattering of light having a particular emitted wavelength or wavelength range. An example of this would be a pulse oximeter which relies on the relative absorption of 665 nm and 905 nm wavelength light sources to determine the oxygen content of blood being measured. Display or printing devices may rely on emitted light of such shorter wavelengths to provide higher resolution.
The intended use or uses for systems with such red light emission VCSELs in them determines the attributes thereof that are of interest including emitted light wavelength, power conversion efficiency, emission divergence angle and the emission mode structure. The mode structure describes the shape of the emitted beam. Some uses require a single mode device, i.e. a device with a uniform round Guassian shaped light emission intensity profile.
The active region, 4, of the VCSEL between mirrors 2 and 3 is formed from a AlGaInP materials system. One or more quantum wells are included in the structure formed of corresponding thin-films with a composition approximately equal to Ga0.5In0.5P. The injected carriers are captured by these quantum wells and then combine to thereby emit light. The composition and thickness of each quantum well thin-film together determines the emission, or photoluminescence, wavelength of the quantum wells. The quantum wells are spaced apart by barrier thin-film layers of AlGaInP, and together are bounded on either side in active region 4 by cladding, or confining, layers, 5 and 6, also of AlGaInP, with the compositions both barrier and cladding layers being chosen such that they are lattice constant matched to GaAs which will serve as the device substrate, and so that they have a bandgap that is larger than that of GaInP for thereby providing photon confinement. The total thickness of the active region is typically one wavelength (1λ) of the light intended to be emitted by the VCSEL thick although it can be any integer multiple of one half of the emission wavelength (nλ/2). A highly doped GaAs capping layer, 7, is provided on doping grading layer 3′ to together reduce electrical resistance in lateral directions.
One of the constraints for the overall VCSEL epitaxial structure is that the lattice constant or parameter of the layers in the structure be nearly equal to that of the underlying GaAs substrate. If this is not true, then lattice defects can form which may cause damage to the device as the device is used and so limit the reliability or lifetime of the device. In the AlGaAs materials system, this condition is met for all possible compositions trading off aluminum for gallium ranging from AlAs to GaAs. However, in the AlGaInP materials system, this condition is met only for the compositions corresponding to (AlxGa1-x)yIn1-yP, where the mole fraction y=0.51. The mole fraction x can be adjusted from 0 to 1.0 without affecting the lattice match to GaAs. However, the bandgap discontinuities in AlGaInP can be adjusted somewhat by adding small amounts of strain to the quantum wells and barrier layers by slightly adjusting the value of y and the thickness of the layers. If the total thickness of the strained layers is kept sufficiently thin (100-200 nm) then defects do not form, and the device reliability is not affected.
Confinement of electrical currents to desired locations in the structure can be provided with the standard techniques of ion implantation and oxide aperture formation as shown in the more general schematic layer diagram of
Red light emission VCSELs have been demonstrated, but, typically, the temperature range of operation is limited and the maximum output power, particularly single mode output power, is also limited. These limits become more significant for shorter wavelength devices. Due to the small bandgap discontinuities and the low thermal conductivities in AlGaInP—AlGaAs material systems, the output power of red light emission VCSELs decreases if the emission wavelength decreases or the operation temperature increases, or both. Small bandgap discontinuities means that carriers that should be captured in the quantum wells and recombined there to emit light, instead, escape and so don't contribute to the light output. As the temperature increases, the charge carriers are even more likely to escape those wells. For shorter wavelength devices, the quantum well needs to be shallower in order to generate the higher energy, or shorter wavelength, light but this also contributes to the escape of charge carriers. Thus, there is a very significant increase in difficulty between achieving high performance in a device emitting at 650 nm versus one emitting at 670 nm, for instance.
Another issue which plays a role in the temperature range of operation is the electrical resistance of the AlGaAs mirrors. The Al0.5Ga0.5As composition, which constitutes approximately 50% of the mirror thickness, has poor thermal conductivity. In addition, the many periods in the mirror contributes to an increase in the resistance, which results in additional heating. The additional heating combined with the extra sensitivity of this material system to temperature only exacerbates the problem. These factors combine to make providing a red light emission VCSEL device with substantial single mode output power particularly difficult. Further, the smaller aperture size of the single mode device typically means that these devices heat more quickly. Thus, there is a desire to have a red light emission VCSEL device configured to be less bounded by such limitations.
The present invention provides a semiconductor material vertical cavity surface emitting laser for emitting narrow linewidth light comprising a compound semiconductor material substrate and at least two first mirror pairs of semiconductor material layers in a first mirror structure on the substrate of a first conductivity type each differing from that other in at least one constituent concentration and each first mirror pair separated from that one remaining by a first mirror spacer layer with a graded constituent concentration. An active region on the first mirror structure has plural quantum well structures separated by at least one active region spacer layer and at least two second mirror pairs of semiconductor material layers in a second mirror structure on the active region of a second conductivity type each differing from that other in at least one constituent concentration and each pair separated from that one remaining by a second mirror spacer layer with a graded constituent concentration. A pair of electrical interconnections is separated by said substrate, said first mirror structure, said active region and said second mirror structure. The quantum well structures can be under stress in one direction with the active region spacer layer under stress in an opposite direction.
The epitaxial structure is grown on a GaAs semiconductor material substrate that is doped n-type, and is labeled layer number 0 in the table. The substrate major surface on which the further layers are to be deposited should be misoriented from the (100) orientation by 6 to 10°. This choice provides an improvement in the optical quality of the AlGaInP layers of the active region where the emitted light is generated. However, a higher degree of misorientation results in a tendency for the high aluminum containing layers of the mirror to oxidize or otherwise degrade at an accelerated rate.
Device mirrors, 2′(layers 2 through 10) and 3′(layers 21 through 32), are made up of two kinds of primary layers alternating with each other in a device layer stack with each comprised of one of two differing compositions of AlxGa1 1-x As, that is, an AlAs layer free of gallium alternating with an Al0.5Ga0.5As layer. These primary layers are spaced apart with layers in between in which the aluminum and gallium distributions are mole fraction graded monotonically over the layer thickness to match the gallium content in the primary layers on either side of the graded spacer layers. While it is desirable for the gallium content of the two primary layers to differ as much as possible in order to maximize the reflectivity to the light intended to be emitted, the minimum aluminum composition is limited to around a mole fraction value x=0.5 in order to eliminate absorption due to the band edge.
Mirror 2′ closest to the substrate is doped to be of n-type conductivity with silicon. Numerous other n-type dopants could alternatively be used, including tellurium and selenium. Mirror 3′ on the opposite side of a device active region, 4′, has the same range of compositions and with similar monotonically graded spacer layers between the two primary layers, but is doped to be of p-type conductivity with carbon. Other p-type dopants could alternatively be used, such as zinc or magnesium. The total thickness of a mirror layers repeatability period is ½λ where λ is the desired wavelength within the range of 650 nm to 680 nm.
The details of the layer thicknesses and doping concentrations are chosen to minimize the electrical resistance of the device without having an unduly negative impact on the optical reflectivity of the mirror or on optical absorption. The thickness of the graded spacer layers is shown to be around 20 nm. The thicknesses of the other two layers are each approximately equal to the ¼λ minus the thickness of a graded spacer layer. The thickness of the graded spacer layer should be at least 10 nm thick to reduce the electrical resistance of the mirror without reducing the optical reflectivity thereof An optimum thickness is typically in the range of 20 to 25 nm.
The choice of doping concentration is also a matter of balancing the desire to reduce resistivity by increasing the doping concentration, without increasing the optical absorption due to free carrier absorption. In the six periods of n-type conductivity mirror 2′ closest to active region 4′, the doping is 5·1017/cm3 in the Al0.5Ga0.5As layers and AlAs layers, and is graded over the layer thickness from 1·1018/cm3, at the side of the graded spacer layers closest to the adjacent AlAs layer, to 5·1017/cm3 at the side of the graded spacer layers closest to the adjacent Al0.5Ga0.5As layers. In the remainder of the n-type conductivity mirror, the doping is uniform at a level of 2·1018/cm3.
Within p-type conductivity mirror 3′, in the first six periods closest to the active region, the doping in the Al0.5Ga0.5As layers is 5·1017/cm3, the doping in the AlAs layer is 1·1018/cm3, and is graded over the layer thickness from 5·1017/cm3, at the side of the graded spacer layers closest to the adjacent Al0.5Ga0.5As layer, to 1·1018/cm3 at the side of the graded spacer layers closest to the adjacent AlAs layers. Inmost In most of the remainder of the p-type conductivity mirror, the doping is 1·1018/cm3 in the Al0.5Ga0.5As layers, 2·1018/cm3 in the AlAs layers, and grades over the layer thickness from 1·1018/cm3, at the side of the graded spacer layers closest to the adjacent Al0.5Ga0.5As layer, to 2·1018/cm3 at the side of the graded spacer layers closest to the adjacent AlAs layers.
The lower doping in the mirror periods closest to the active region in both p-type conductivity mirror 3′ and n-type conductivity mirror 2′ is chosen to reduce the free carrier absorption in the layers where the optical field is highest. The more distant mirror periods have a weaker effect on absorption of the optical beam, and hence a higher doping concentration can be tolerated to aid in reducing the electrical resistance.
At the outer surface of p-type conductivity mirror 3′ in the device (outer surface of layer 30) there is provided a first Al0.5Ga0.5As layer, in which the doping is graded from 2·1018/cm3 to 3·1019/cm3, to thereby grade to the doping of a further layer of Al0.5Ga0.5As that is provided thereon doped to 3·1019/cm3. The outermost layer is GaAs and is doped at >1·1019/cm3. These three layers together come to a thickness of approximately 9λ/4 thick where λ is the desired emission wavelength of the device. The purpose of doping these topmost layers of the structure at a very high concentration is to provide a very low lateral resistance in order to spread the device operating electrical current evenly across the aperture of the device.
In the case where an oxide aperture is used for current confinement, the compositions of the mirror are to be adjusted. Since the layer to be oxidized must contain a higher Al concentration than the other mirror layers, AlAs can no longer be used for the low index layer. Typically AlxGa1-xAs with x in the range from 0.85 to 0.95 would be used. However, if the oxide aperture is located in mirror 3′ between the active layer and the metal interconnection with an aperture, then it is preferable to continue to use AlAs as the low index layer in the other mirror (mirror 2′ closest to the substrate), in order to minimize the electrical resistivity and maximize the thermal conductivity of this latter mirror. On the other hand, 2 to 4 of the bottom mirror periods closest to the quantum well active region may also have a reduced aluminum content, in order to avoid accidental oxidization of these layers when the aperture is being oxidized.
Other doping concentrations are possible for use ranging from a low of 1·1017/cm3 in the six layer repeatability periods of mirrors 2′ and 3′ closest to the active region to a high of 3·1018/cm3 in the remaining portions of those mirrors. However, concentrations within approximately ±30% of the ones specified in
Other variations on mirror configurations can have benefits in reducing the electrical resistance of the device or improving the thermal conductivity, or both, one of which is shown in the example of FIG. 4.
Yet another variation for reducing the electrical resistance of the mirror structure is illustrated in FIG. 5. Since the mobility of n-type conductivity AlAs and AlGaAs is significantly higher than that of p-type material, the electrical resistivity of the device in the table of
In between the two mirrors 2′ or 2″ and 3′ or 3″ of the device of the table in
Active region 4′ begins from mirror 2′ with a 60 nm thick ungraded spacer or cladding layer 5′ of Al0.7Ga0.3InP, doped to have a n-type conductivity at a level of 5·1017/cm3, followed by a 15 nm thick layer of the same composition but undoped. The next layer is a 20 nm thick layer of undoped Al0.4Ga0.6InP. The light generating layers consist of the three Ga0.46In0.54P quantum wells of approximately 7 nm thickness each seperated separated by two Al0.4Ga0.6InP barrier layers with a thickness of 6 nm each, all undoped. This is followed by another 20 nm thick layer of an undoped Al0.4Ga0.6InP composition. Active region 4′ is then ended on the side thereof opposite from where it begins by Al0.7Ga0.3InP ungraded spacer or cladding layer 6′ with a thickness of 75 nm and doped p-type to a level of 1·1018/cm3 that is located next to the structure of p-type conductivity mirror 3′. The total thickness of including the AlGaInP layers is adjusted to be equivalent to the optical thickness of 1λ, where λ is again the desired emission wavelength of the VCSEL. The thicknesses of the Ga0.46In0.54P quantum well layers in active region 4′ are adjusted slightly to achieve the desired emission wavelength in the range of 640 to 670 nm depending upon the desired emission wavelength within that range.
Active region 4′ of AlGaInP materials is chosen to provide the best carrier injection and carrier confinement in order to improve the wavelength and temperature range of operation, and to improve the output power. The quantum well composition of Ga0.46In0.54P is chosen to provide a compressive strain of approximately 0.5%. This increases the well depth, and increases the bandgap discontinuity between the quantum wells and surrounding barrier layers, to reduce carrier leakage. The composition of the spacer, or cladding, layers 5′ and 6′ is also chosen to be near the maximum band edge offset to provide improved carrier confinement. Finally, the doping concentrations and locations are chosen to provide a balance between good carrier injection, without undue free carrier absorption. In particular, the use of a higher concentration of p-doping with zinc (1·1018/cm3) provides an improved barrier to electron leakage into p-type conductivity mirror 3′ which would cause increased optical absorption.
The wavelength at the peak of the photoluminescence emission from the quantum wells is chosen to be 5 nm to 15 nm shorter than the Fabry-Perot resonance cavity mirror separation, or cavity emission wavelength, to enhance the higher temperature performance of the devices. This increases the temperature range of operation since the peak of the quantum well emission moves to higher wavelengths with increasing temperature faster than the Fabry-Perot resonance wavelength, the emission wavelength of the VCSEL cavity increases with temperature. This means that the two are aligned at a temperature above room temperature and so improves the higher temperature performance. The offset between the cavity emission and the quantum well emission can be increased to achieve improved higher temperature performance, but this comes at the cost of an increased threshold current, and reduced output power at room temperature and below. The two considerations are balanced depending upon the performance requirements of a particular use selected for the device.
Active region 4″ between mirrors 2′ and 3′ is still a total of 1λ thick, where λ is the desired optical emission wavelength. With the exception of the quantum wells and barrier layers, the In composition of all the layers is chosen to be lattice constant matched to GaAs, i.e. approximately (AlxGa1-x)0.51In0.49P.
The first layer adjacent to n-type conductivity AlGaAs material based mirror 2′ is a (Al0.7Ga0.3)InP spacer, or part of a cladding layer, 5″, (layers 11a through 12) doped to have an n-type conductivity at 5·1017/cm3. Then, over a thickness of approximately 55 nm there is provided a graded spacer layer, with the composition mole fraction graded from x=0.7 to x=0.5. This layer is also doped to have n-type conductivity at 5·1017/cm3. This is followed by an undoped Al0.5Ga0.5InP that is 14 nm thick.
Next are four barrier layers interleaved with three quantum well layers, all undoped. The quantum well layers are compressively strained with a composition of Ga0.46In0.54P. Unlike the structure of
After the fourth tensile stressed barrier layer is a cladding layer, 6″, beginning with lattice constant matched undoped Al0.5Ga0.5InP layer with a thickness of 14 nm. A graded spacer then follows with its composition mole fraction graded from x=0.5 to x=0.7 over a thickness of 55 nm. This layer is doped 1·1018/cm3. The final Al0.7Ga0.3InP spacer in cladding layer 6″ is 20 mn thick and doped 1·1018/cm3.
Thus, active region 4″ in this VCSEL has a balancing of the compressive stress of the quantum wells with the tensile stress of the interleaved barrier layers to provide even better carrier confinement. The tensile stress, in combination with the compressively strained quantum wells, provides an even greater improvement in the quantum well depth than is observed in a structure with lattice matched barrier layers and compressively strained quantum wells of the same composition. In addition, the balancing of the strain makes it possible to decrease y even more to create an even greater degree of compressive strain in the quantum wells without risking the generation of defects that would have a negative impact on device lifetime. In addition, the mole fraction graded x=0.5 to x=0.7 AlGaInP layers also provide better carrier confinement.
Another variation of the active region configuration is shown in the active region representation diagrams of FIG. 7.
In addition to the foregoing epitaxial layers, other structural arrangements are provided in the devices to obtain current confinement and allow electrical contact so as to also improve the performance of the devices.
However, the implanted structure for layer 18 has several advantages. It allows the use of AlAs in the top mirror which has a higher thermal conductivity than AlGaAs and thus will allow easier heat removal. It generates less stress than does an oxide layer, and hence can result in a more reliable device. It provides a smaller contrast in refractive index, and hence can allow a single mode device to be made at a higher diameter (up to 10 μm) than would be possible with an oxide aperture.
The correct aperture size for the aperture in layer 18 in a single mode device with the gain guide provided by an ion implantation is 6 μm<aperture diameter<μm, with 8 to 10 μm typically the optimum size. A smaller diameter device would be required to achieve a single mode device with an oxide aperture for carrier confinement.
The emission aperture in metal interconnection 19, which allows the light to escape the device for emission, should nominally be the same diameter as the implant aperture ±0.5 μm though shown as of different diameters in FIG. 10. Equal metal and implant aperture diameters typically provide the best combination of output power efficiency and low lateral resistance (i.e. the current does not need to travel a longer lateral distance to reach the aperture.)
A particular issue in red VCSEL devices is thermal lensing, i.e. the index of refraction is affected by heating in a nonuniform manner. Both the proton implant and the oxide aperture methods for providing electrical and optical energy confinement in VCSELs present limitations. Generally, oxide apertures provide too strong index guiding resulting in multi-mode devices for all but the smallest apertures. While single mode devices can be achieved for small aperture devices, the amount of single mode output power achievable is limited by heating and current density. On the other hand, the weak index guiding provided by the proton implant can allow single mode performance to be achieved at larger diameters, but thermal lensing becomes a problem, with the modal structure varying as a function of temperature. When the device is to be modulated with a very wide bandwidth, the occurrence of thermal lensing can lead to difficulties in achieving modulation with a predictable and stable output power as a function of temperature.
One alternative red light VCSEL device, 10′, for maximizing the ability to achieve high single mode output power while minimizing the thermal lensing is to use a double proton implant, or a graded ion implantation therein as is shown in the representative schematic diagram of FIG. 11. The lower energy implant layer, 18′, is shallower, and a mask forming a smaller diameter unimplanted region is used. The second, higher energy implant, to form implant layer 18 is used with a mask that provides a larger diameter unimplanted region. The higher, smaller diameter implant layer 18′ helps to guide the current flow to the center of the lower implant aperture, thus helping to counteract the thermal lensing effect that guides current away from the center. However, this approach keeps the current density in the active region consistent with a larger diameter device which is important for achieving a larger single mode output power, and improve device lifetime.
This effect can also be refined by using multiple (>2) implant energies and mask diameters, or possibly by the use of implantation done at an angle to achieve the effect of a smaller diameter implant toward the surface of the device, and a larger diameter implant closer to the active region.
Yet another alternative, 10″, for achieving mode control and a larger diameter single mode in a red light. VCSEL device is shown in the representative schematic diagram of FIG. 12. This uses a combination of an ion implantation aperture and an oxide aperture. The specific implantation is to provide proton implant layer 18 to a depth centered close to quantum well active region 14, i.e. centered anywhere from the quantum well active region to four periods above the quantum wells. In addition, an oxide layer, 18″, with an aperture is formed at a position greater than six periods toward interconnection 19 from quantum well active region 14 in order to provide a weak index guide. Basically, oxide layer 18″ will provide a weak index confinement for the optical modes, providing greater stability with temperature of the optical modes, while proton implant layer 18 will provide the electrical current confinement.
Another alternative for a red light VCSEL device configuration and its fabrication process is shown in the representative schematic diagram of FIG. 13. In this case, an etch into capping layer 17 and mirror 13 of
Another arrangement, 10 fv, for the electrical contact structure of a red light emission VCSEL is shown in FIG. 14. In this arrangement, metal contacts, 26, suited for ohmic connection to n-type conductivity material make electrical contact to a surface provided parallel to the substrate of a modified n-type conductivity cladding layer 15′ in active region 14 at n-type conductivity mirror, 12. Further, metal contacts, 27, suited for ohmic connection to p-type conductivity material make electrical contact to a surface provided parallel to the substrate of a modified p-type conductivity mirror, 13′. Thus, contacts to the pn junction of the VCSEL device are made to a cladding layer and a mirror layer in and near active region 14 within VCSEL device 10′″ rather than being formed to the substrate and emission surface of the device. This arrangement requires etching two mesas—one mesa is etched in the portion of p-type conductivity mirror 13 of
This arrangement places the metal interconnection layers, which typically have a high thermal conductivity, as close to the active region as possible to enable the removal of heat generated during device operation. Furthermore, current does not have to be passed through the higher resistance mirror layers thereby minimizing the heat generation during operation due to electrical resistance.
Other ways for managing the thermal heat generation and removal include the use of an overcoating on the chip with a polymer or dielectric layer with a high thermal conductivity, such as diamond, or aluminum nitride (AlN). The use of solder to attach the die to the package, rather than conductive epoxy may improve the heat removal through the package. Thinning the substrate to less than 100 μm and attaching the die to a high thermal conductivity submount may improve the heat removal.
Another arrangement for heat removal is shown in a representative schematic diagram of a VCSEL array packaging configuration in FIG. 16. In this configuration the device bond pads, 28, are plated with thick metal with red light VCSELs 10, for example, positioned between them, and the resulting array device is mounted by solder or stud bumping to a transparent superstrate, 29, preferably one with superior thermal conductance. The proximity of devices 10 to metal lines 28 carrying away the heat is advantageous for those devices.
Alternatively, GaAs substrate 11 could be removed after the device is mounted to superstrate 29, and contacts could be made to the back side of the VCSEL devices. The chip or wafer would then be mounted on a high thermal conductivity submount, which now no longer needs to be transparent. This would also facilitate removal of the heat.
A further representative schematic diagram of a VCSEL array packaging configuration is shown in FIG. 17. In this package, following partial fabrication of the VCSEL structure (the formation of the proton implant or oxide aperture in a VCSEL 10 for example), the wafer with the partially fabricated VCSELs can be attached at an exposed surface of p-type conductivity mirrors 13 therein, for example, to a submount coated with a thick, thermally conductive metal layer, 30. The original GaAs substrate 11 is then removed, and a metal contact, 31, is deposited and patterned on the now exposed surface of the remaining structure originally located next to GaAs substrate 11 (n-type conductivity mirror 12 in this example). This metal contains open apertures allowing the light to escape from the center of each VCSEL. The result also allows for the use of a thick metal layer in close proximity to active region 14 to facilitate heat removal from the device.
A representative schematic diagram of a VCSEL device packaging configuration with active heat removal is shown in FIG. 18. In this package, the VCSEL structure could be any of the configurations already described, or some combination of those configurations. A VCSEL device 10, as an example, is placed directly upon a thermo-electric cooler, 32, to control the temperature of the device during its operation. Thermoelectric coolers are standard microelectronic components for controlling the temperature of circuit or other heat generating operating devices, such as an optoelectronic device or an integrated circuit, and can be purchased in sizes small enough to fit inside a TO header style package, 33. Alternatively, a thermoelectric cooler could be monolithically integrated by first growing a number of GaAs pn junctions for such a cooler on a GaAs substrate, before the growth and processing of the VCSEL structure materials to thereby form VCSEL devices. A stack of around 5 to 20 pn junctions would be grown sequentially one on top of the previous each on the order of 1,000 to 5,000 Å thick as the basis for the cooler. The junctions can be electrically interconnected in parallel through selective etching and metallization interconnection, or electrically interconnected in series through use of intermediate tunnel junctions. Active cooling of VCSEL devices allows keeping them in suitable temperature ranges in which the desired performances can be achieved.
In the devices set out in the foregoing, the key consideration for the mirrors is to reduce the series electrical resistance thereof and the optical absorption therein which in turn results in less heating of the device. This is accomplished by increasing the width of the graded layers in the mirror, reducing the doping levels in the mirror close to the active region, and increasing the doping level in the mirror repeating material layer periods further away from the active region. Reduction of resistance, and therefore heating, is also addressed by heavily doping the layers of the p-type conductivity mirror farthest from the active region to reduce the contact and lateral resistance.
Within the active region, the choices available are made to minimize the impact of heating. The choice of quantum wells with compressive strain, combined with either lattice matched or tensile strained barrier layers, improves the carrier confinement in the active region, thus increasing the temperature range of operation. The use of a more highly p-doped region in the p-type spacer or cladding layer confines electrons to the active region, and prevents them from being injected into the p-type conductivity mirror. Layer composition choices and grading is also done with the objective of improving carrier confinement.
Thermal conductivity must also be improved so that heat can be removed more effectively from the device. The use of the proton implanted structures combined with AlAs containing mirror contributes to that objective. The width of the isolation implant region is limited with the objective of improving thermal conductivity. Etching of the top mirror, and deposition of metal on the etched sidewalls provides a path for heat removal. The deposition of a thermally conductive dielectric, the use of solder in the package, and the packaging structures described for more effectively providing a short thermal path from device to package are all designed to remove heat from the device more quickly and effectively. In general, these enhancements will increase the output power, reduce the threshold current for lasing, reduce the resistance, and increase the temperature range over which the devices successfully operate.
Although the present invention has been described with reference to preferred embodiments, workers skilled in the art will recognize that changes may be made in form and detail without departing from the spirit and scope of the invention.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US5258990||Nov 7, 1991||Nov 2, 1993||The United States Of America As Represented By The Secretary Of The United States Department Of Energy||Visible light surface emitting semiconductor laser|
|US5351256||Apr 28, 1993||Sep 27, 1994||The United States Of America As Represented By The United States Department Of Energy||Electrically injected visible vertical cavity surface emitting laser diodes|
|US5428634 *||Nov 5, 1992||Jun 27, 1995||The United States Of America As Represented By The United States Department Of Energy||Visible light emitting vertical cavity surface emitting lasers|
|US5491710||May 5, 1994||Feb 13, 1996||Cornell Research Foundation, Inc.||Strain-compensated multiple quantum well laser structures|
|US5557627 *||May 19, 1995||Sep 17, 1996||Sandia Corporation||Visible-wavelength semiconductor lasers and arrays|
|US5726462 *||Feb 7, 1996||Mar 10, 1998||Sandia Corporation||Semiconductor structures having electrically insulating and conducting portions formed from an AlSb-alloy layer|
|US6057560 *||Sep 26, 1997||May 2, 2000||Canon Kabushiki Kaisha||Multi-layer, mirror of compound semiconductors including nitrogen and surface light-emitting device with the same|
|US6570905 *||Nov 2, 2000||May 27, 2003||U-L-M Photonics Gmbh||Vertical cavity surface emitting laser with reduced parasitic capacitance|
|US6618410 *||Dec 6, 1999||Sep 9, 2003||Infineon Technologies Ag||Optoelectronic semiconductor component|
|US6810065 *||Nov 28, 2001||Oct 26, 2004||Optical Communication Productions, Inc.||Low electrical resistance n-type mirror for optoelectronic devices|
|US6931042 *||May 31, 2001||Aug 16, 2005||Sandia Corporation||Long wavelength vertical cavity surface emitting laser|
|US7006545 *||Jun 8, 2001||Feb 28, 2006||The Furukawa Electric Co., Ltd.||Semiconductor laser device and optical fiber amplifier using the same|
|US7075962||Jun 27, 2003||Jul 11, 2006||Finisar Corporation||VCSEL having thermal management|
|US7110427 *||Sep 3, 2004||Sep 19, 2006||Finisar Corporation||Hybrid mirror VCSEL|
|US20020101899 *||May 30, 2001||Aug 1, 2002||Noriyuki Yokouchi||Vertical cavity surface emitting laser device|
|US20020159061 *||Feb 21, 2001||Oct 31, 2002||Ottens Gregory J.||Focused laser light turbidity sensor|
|US20040208216 *||May 10, 2004||Oct 21, 2004||Naone Ryan Likeke||Long wavelength vertical cavity surface emitting laser|
|US20050233486 *||Jun 6, 2005||Oct 20, 2005||Finisar Corporation||Vertical cavity surface emitting laser having a gain guide aperture interior to an oxide confinement layer|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US8989230||Dec 28, 2012||Mar 24, 2015||Vixar||Method and apparatus including movable-mirror mems-tuned surface-emitting lasers|
|US9088134||Jul 27, 2012||Jul 21, 2015||Vixar Inc.||Method and apparatus including improved vertical-cavity surface-emitting lasers|
|U.S. Classification||372/50.124, 372/99, 372/92|
|International Classification||H01S5/00, H01S3/08|
|Cooperative Classification||H01S5/34326, H01S5/18358, H01S5/18308, H01S5/024, H01S5/3406, B82Y20/00, H01S5/18333, H01S5/2063, H01S5/423, H01S5/18311, H01S5/3215, H01S5/3095|
|European Classification||B82Y20/00, H01S5/183C7M2, H01S5/343E|
|Sep 23, 2011||FPAY||Fee payment|
Year of fee payment: 4
|Mar 2, 2012||AS||Assignment|
Owner name: VIXAR, INC., MINNESOTA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MYTEK, LLC D/B/A VIXAR;REEL/FRAME:027795/0081
Effective date: 20120228
|Oct 15, 2015||FPAY||Fee payment|
Year of fee payment: 8