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Publication numberUSRE41841 E1
Publication typeGrant
Application numberUS 11/208,132
Publication dateOct 19, 2010
Filing dateJun 8, 2000
Priority dateJun 14, 1999
Fee statusPaid
Also published asEP1186024A1, EP1186024B1, US6607968, WO2000077846A1
Publication number11208132, 208132, US RE41841 E1, US RE41841E1, US-E1-RE41841, USRE41841 E1, USRE41841E1
InventorsMalgorzata Jurczak, Thomas Skotnicki
Original AssigneeMalgorzata Jurczak, Thomas Skotnicki
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Method for making a silicon substrate comprising a buried thin silicon oxide film
US RE41841 E1
Abstract
A method for making a silicon substrate having a buried thin silicon oxide film is described. The method consists of: a) producing a first element having a first silicon body whereof the main surface is coated, in succession, with a buffer layer of germanium, or of an alloy of germanium and silicon, and with a thin silicon film; b) producing a second element, having a silicon body whereof a main surface is coated with a thin silicon oxide film; c) linking the first element with the second element such that the thin silicon film of the first element is in contact with the thin silicon oxide film of the second element; and d) eliminating the buffer layer to recuperate the silicon substrate having a buried thin silicon oxide film and a reusable silicon substrate. The method may be useful in making microelectronic devices such as CMOS and MOSFET devices.
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Claims(41)
1. A method of fabricating a silicon substrate comprising a thin buried silicon oxide layer, the method comprising:
producing a first element comprising a first silicon body, wherein a main surface of the first element is coated with a buffer layer comprising germanium and a thin silicon layer, in that order;
producing a second element comprising a second silicon body, wherein a main surface of the second element is coated with a thin silicon oxide layer;
bonding the first element to the second element such that the thin silicon layer of the first element is in contact with the thin silicon oxide layer of the second element; and
removing the buffer layer in order to recover the silicon substrate comprising the thin buried silicon oxide layer and a reusable silicon substrate.
2. The method of claim 1, wherein the buffer layer comprises a silicon-germanium alloy chosen from the alloys Si1-xGex(0<x<1) and Si1-x-yGexCy(0<x<0.95; 0<y≦0.05).
3. The method of claim 1, wherein the buffer layer comprises a germanium-silicon alloy, and wherein the germanium-silicon alloy comprises at least 10% by weight of germanium.
4. The method of claim 1, wherein the buffer layer comprises a layer made of a silicon-germanium alloy having a germanium concentration gradient.
5. The method of claim 1, further comprising forming the buffer layer and the thin silicon layer of the first element by epitaxial deposition.
6. The method of claim 5, wherein the epitaxial deposition comprises chemical vapor deposition or molecular beam epitaxial deposition.
7. The method of claim 1, further comprising forming the silicon oxide layers by thermal oxidation.
8. The method of claim 1, wherein removing the buffer layer comprises selective dissolution of the buffer layer by an oxidizing solution or by anisotropic plasma etching.
9. The method of claim 1, wherein the buffer layer comprises a germanium-silicon alloy.
10. The method of claim 1, wherein the buffer layer comprises a germanium-silicon alloy, and wherein the germanium-silicon alloy comprises at least 30% by weight of germanium.
11. A method of fabricating a silicon substrate comprising a thin buried silicon oxide layer, the method comprising:
producing a first element comprising a first silicon body, wherein a main surface of the first element is coated with a buffer layer comprising germanium, a thin silicon layer, and a first thin silicon oxide layer, in that order;
producing a second element comprising a second silicon body, wherein a main surface of the second element is coated with a second thin silicon oxide layer;
bonding the first element to the second element such that the first thin silicon oxide layer of the first element is in contact with the second thin silicon oxide layer of the second element; and
removing the buffer layer in order to recover the silicon substrate comprising the thin buried silicon oxide layer and a reusable silicon substrate.
12. The method of claim 11, wherein the buffer layer comprises a silicon-germanium alloy chosen from the alloys Si1-xGex(0<x<1) and Si1-x-yGexCy(0<x<0.95; 0<y≦0.05).
13. The method of claim 11, wherein the buffer layer comprises a germanium-silicon alloy, and wherein the germanium-silicon alloy comprises at least 10% by weight of germanium.
14. The method of claim 11, wherein the buffer layer comprises a layer made of a silicon-germanium alloy having a germanium concentration gradient.
15. The method of claim 11, further comprising forming the buffer layer and the thin silicon layer of the first element by epitaxial deposition.
16. The method of claim 15, wherein the epitaxial deposition comprises chemical vapor deposition or molecular beam epitaxial deposition.
17. The method of claim 11, further comprising forming the silicon oxide layers by thermal oxidation.
18. The method of claim 11, wherein removing the buffer layer comprises selective dissolution of the buffer layer by an oxidizing solution or by anisotropic plasma etching.
19. The method of claim 11, wherein the buffer layer comprises a germanium-silicon alloy.
20. The method of claim 11, wherein the buffer layer comprises a germanium-silicon alloy, and wherein the germanium-silicon alloy comprises at least 30% by weight of germanium.
21. A method of fabricating a silicon substrate comprising a thin buried silicon oxide layer, the method comprising:
producing a first element comprising a silicon body, wherein a main surface of the first element is coated with a buffer layer comprising germanium, a thin silicon layer, and a thin silicon oxide layer, in that order;
obtaining a second element comprising a silicon body;
bonding the first element to the second element such that the thin silicon oxide layer of the first element is in contact with the silicon body of the second element; and
removing the buffer layer in order to recover the silicon substrate comprising the thin buried silicon oxide layer and a reusable silicon substrate.
22. The method of claim 21, wherein the buffer layer comprises a silicon-germanium alloy chosen from the alloys Si1-xGex(0<x<1) and Si1-x-yGexCy(0<x<0.95; 0<y≦0.05).
23. The method of claim 21, wherein the buffer layer comprises a germanium-silicon alloy, and wherein the germanium-silicon alloy comprises at least 10% by weight of germanium.
24. The method of claim 21, wherein the buffer layer comprises a layer made of a silicon-germanium alloy having a germanium concentration gradient.
25. The method of claim 21, further comprising forming the buffer layer and the thin silicon layer of the first element by epitaxial deposition.
26. The method of claim 25, wherein the epitaxial deposition comprises chemical vapor deposition or molecular beam epitaxial deposition.
27. The method of claim 21, further comprising forming the silicon oxide layers by thermal oxidation.
28. The method of claim 21, wherein removing the buffer layer comprises selective dissolution of the buffer layer by an oxidizing solution or by anisotropic plasma etching.
29. The method of claim 21, wherein the buffer layer comprises a germanium-silicon alloy.
30. The method of claim 21, wherein the buffer layer comprises a germanium-silicon alloy, and wherein the germanium-silicon alloy comprises at least 30% by weight of germanium.
31. A method, comprising:
contacting a first element to a second element such that a silicon layer on a surface of the first element is in contact with a silicon oxide layer on a surface of the second element, wherein the first element includes a buffer layer comprising germanium; and
removing the buffer layer to produce a silicon substrate with the silicon oxide layer beneath the silicon layer.
32. The method of claim 31, wherein the silicon substrate comprises the second element and the silicon oxide layer beneath the silicon layer.
33. The method of claim 31, wherein the buffer layer is beneath the silicon layer on the surface of the first element.
34. The method of claim 31, wherein the first element comprises a silicon body.
35. The method of claim 31, wherein the second element comprises a silicon body.
36. The method of claim 31, wherein contacting the first element to the second element comprises bonding the surface of the first element to the surface of the second element.
37. The method of claim 31, further comprising depositing the buffer layer and the silicon layer on the first element using chemical vapor deposition and/or molecular beam epitaxial deposition.
38. The method of claim 31, further comprising forming the silicon oxide layer on the second element by thermal oxidation.
39. The method of claim 31, wherein removing the buffer layer produces a reusable silicon substrate.
40. The method of claim 31, wherein removing the buffer layer comprises selective dissolution of the buffer layer by an oxidizing solution or by anisotropic plasma etching.
41. The method of claim 31, wherein the buffer layer comprises a silicon-germanium alloy chosen from the alloys Si 1-x Ge x ( 0<x<1 ) and Si 1-x-y Ge x C y ( 0<x<0.95; 0<y≦0.05 ).
Description
BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention generally relates to a method of fabricating a silicon substrate having a thin buried silicon oxide layer (SOI substrate) and in particular to a method of this sort which makes it possible to produce an SOI substrate having a buried silicon oxide layer that is extremely thin and has excellent uniformity.

2. Description of the Related Art

The known techniques of fabricating an SOI substrate all have a number of drawbacks, in particular, a low production yield, a substrate quality which is still inadequate, and the production of a thin Si layer and a thin buried silicon oxide layer which are relatively thick and of mediocre uniformity.

A first method of fabricating an SOI substrate, known by the name of “SIMOX technology”, consists of forming the buried SiO2 layer in a silicon substrate by implanting oxygen at high dose followed by annealing at a temperature greater than 1300° C. A major drawback of this method is that it requires nonstandard equipment. Furthermore, the length of time for the process of implanting oxygen at high dose considerably reduces the production efficiency.

The substrates obtained by this method also suffer from inadequate quality of the buried silicon oxide layer and of the thin silicon layer (high pinhole density).

Finally, because the thin layers (thin Si layer and thin buried silicon oxide layer) are determined by the implantation process, this method makes it difficult to achieve thicknesses of less than 50 nm for the thin silicon layer and 80 nm for the buried SiO2 layer.

A second method, known by the name of “BESOI technique”, consists of forming a thin SiO2 film on a surface of a first silicon body, then bonding this first body to a second silicon body by means of the thin SiO2 film, and finally, removing part of one of the silicon bodies by mechanical grinding and polishing in order to form the thin silicon layer above the buried silicon oxide layer.

The silicon oxide layer on the first silicon body is formed by successively oxidizing the surface of this first body, then etching the oxide layer formed in order to obtain the desired thickness.

This method only allows relatively thick buried silicon oxide layers and silicon layers to be produced on the buried silicon oxide because of the poor control of the etching method. Furthermore, the thin layers obtained by this method have poor uniformity.

A third method, known by the name of “SMART CUT technology”, consists of forming, by oxidation, a thin silicon oxide layer on a first silicon body, then implanting H+ ions in the first silicon body in order to form a cavity plane in this first silicon body under the thin silicon oxide layer. Subsequently, by means of the thin silicon oxide layer, this first body is bonded to a second silicon body and then the assembly subjected to thermal activation in order to transform the cavity plane into a cleaving plane. This makes it possible to recover, on the one hand, an SOI substrate and, on the other hand, a reuseable silicon body.

This method requires the implantation of a high dose of hydrogen atoms. In spite of using atoms of smaller size for the implantation, the surface of the thin silicon layer obtained is also damaged. Furthermore, since the thickness of the thin silicon layer is defined by the implantation energy of the hydrogen atoms, it is difficult to make this thickness less than about 50 nm.

The methods above are described, in particular, in the article SOI: Materials to Systems, A. J. Auberton-Hervé, 1996, IEEE.

Therefore, a method of fabricating an SOI substrate, which overcomes the drawbacks of the methods of the prior art, may be desired.

In particular, a method of fabricating an SOI substrate which makes it possible to produce silicon oxide layers and silicon layers on the buried oxide layer that are very thin and of very good uniformity may be favorable.

A method of fabricating an SOI substrate that can be implemented in standard equipment may also be desired.

SUMMARY OF THE INVENTION

According to a first embodiment of the invention, the method of fabricating a silicon substrate having a thin buried silicon oxide layer includes:

    • a) the production of a first element having a silicon body, a main surface of which is coated with a buffer layer made of germanium or of a germanium-silicon alloy and with a thin silicon layer, in that order;
    • b) the production of a second element, distinct from the first element, having a silicon body, a main surface of which is coated with a thin silicon oxide layer;
    • c) the bonding of the first element to the second element such that the thin silicon layer of the first element is in contact with the thin silicon oxide layer of the second element; and
    • d) the removal of the buffer layer made of germanium or of a germanium-silicon alloy in order to recover the silicon substrate having a thin buried silicon oxide layer, on the one hand, and a reuseable silicon substrate, on the other hand.

According to a second embodiment of the invention, the method of fabricating a silicon substrate having a thin buried silicon oxide layer includes:

    • a) the production of a first element having a silicon body with a main surface and coated with a buffer layer made of germanium or of a germanium-silicon alloy, a thin silicon layer and a thin silicon oxide layer, in that order;
    • b) the production of a second element having a silicon body, a main surface of which is coated with a thin silicon oxide layer;
    • c) the bonding of the first element to the second element, such that the thin silicon oxide layer of the first element is in contact with the thin silicon oxide layer of the second element; and
    • d) the removal of the buffer layer in order to recover the silicon substrate having a thin buried silicon oxide layer, on the one hand, and a reuseable silicon substrate, on the other hand.

In a third embodiment of the invention, the method of fabricating a silicon substrate having a thin buried silicon oxide layer includes:

    • a) the production of a first element having a silicon body, a main surface of which is coated with a buffer layer made of germanium or of a germanium-silicon alloy, a thin silicon layer and a thin silicon oxide layer, in that order;
    • b) the production of a second element comprising a silicon body;
    • c) the bonding of the first element to the second element such that the thin silicon oxide layer of the first element is in contact with the silicon body of the second element; and
    • d) the removal of the buffer layer in order to recover the silicon substrate having a thin buried silicon oxide layer, on the one band, and a reuseable silicon substrate, on the other hand.

The thin buffer layers made of Ge and germanium-silicon alloys of the first element may be produced by epitaxial deposition. For example, the thin buffer layers are produced by well-known methods of vapor deposition or of molecular beam epitaxial deposition, such that the thin silicon layer may have a very small thickness of a few nanometers while still having a suitable uniformity, typically from 1 to 50 nm.

The thin buried oxide layer may be produced by a known thermal oxidation method, such that it is possible to obtain an oxide layer of very high quality with a virtually arbitrary thickness that can vary from 2 nm to 400 nm.

As is known per se, the bonding of the first and of the second elements can be carried out by using the Van der Waals forces. In order to increase the strength at the interface between the elements, the assembly can possibly be subjected to annealing.

The buffer layer of the first element may consist of pure germanium, of a silicon-germanium alloy or of a silicon-germanium alloy containing carbon. More particularly, Si1-xGex alloys (0<x<1) or Si1-x-yGexCy alloys (0<x≦0.95 and 0<y≦0.05) can be used.

As is known, the germanium and the Si1-xGex and Si1-x-yGexCy alloys have very high selectivity to chemical etching by solutions or to anisotropic plasma etching. In the case of silicon-germanium alloys, in order to obtain etching of high selectivity, it is preferable that the proportion of germanium in the alloy is at least equal to 10% by weight, and preferably equal to or greater than 30% by weight.

The use of the silicon-germanium alloy containing a small proportion of carbon makes it possible to reduce the high stresses between the silicon layers and the buffer layer. Thus, it is possible to use alloys with higher germanium concentrations and, consequently, with better etching selectivity, while producing a relaxation of the stresses. It is also possible to form a buffer layer made of a silicon-germanium alloy having a germanium concentration gradient (relaxed SiGe buffer layer). In this type of buffer layer, the germanium concentration increases from the silicon body of the first element.

It is thus possible to make relatively thick buffer layers, which can significantly increase the etching rate. Because of their thickness, the buffer layers may have a surface free of dislocations (all the dislocations and defects being located in the low part of the buffer layer), which provides good conditions and good continuity for the epitaxial growth of the thin single-crystal silicon layer which is to be deposited later.

In the SiGe alloy layer, the concentration profile of the germanium can be nonuniform. Thus, at the bottom of the layer, the Ge concentration can be 0%, then increase to 50% (or 70% and even 100%), and then decrease down to 0%. This solution makes it possible to avoid deformations in the upper silicon layer and to remove the thickness limitations. A high molar fraction of Ge in the SiGe alloy (in particular in the middle of the layer) provides, on the one hand, a very high selectivity of the etching method and, on the other hand, freedom from the risk of relaxation of the Si film.

BRIEF DESCRIPTION OF THE DRAWINGS

The remainder of the description refers to the appended figures, which show:

FIGS. 1a to 1e depict the main steps of a first embodiment of the method of the invention; and

FIGS. 2a to 2e depict the main steps of a second embodiment of the method of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

With reference to FIGS. 1a to 1e, a first embodiment of the method of the invention starts, as shown in FIG. 1a, with the successive deposition by epitaxy (for example, by chemical vapor deposition or by molecular beam epitaxy) of a layer 2a of germanium, or a silicon-germanium alloy possibly including a small proportion of carbon, then of a thin silicon layer 3a.

Typically, the buffer layer 2a and the silicon layer 3a have a thickness of from 1 to 50 nm. Thus a first element A is made, having a silicon body 1a with a main surface coated with a buffer layer 2a made of germanium, or of a germanium-silicon alloy, and with a thin silicon layer 3a, in that order.

Moreover, a thin silicon oxide layer 2b is formed on a silicon body 1b, distinct from the previous silicon body, by a conventional thermal oxidation method. This produces a second element B having a silicon body 1b, a main surface of which is coated with a thin silicon oxide layer 2b, as shown in FIG. 1b.

At this stage, the first element A and the second element B are bonded, as is shown in FIG. 1c, such that the thin silicon layer 3a of the first element A is in contact with the silicon oxide layer 2b of the second element B. The first and second elements A and B are bonded one to the other, in a known manner, using the Van der Waals forces.

The selective removal of the buffer layer 2a is then carried out, as shown in FIG. 1d. For example, a well-known oxidizing chemistry may be used, such as a solution comprising 40 ml of 70% HNO3+20 ml of H2O2+5 ml of 0.5% HF or by anisotropic plasma etching.

Once the buffer layer 2a is completely removed, a silicon substrate is obtained, as shown in FIG. 1e. The silicon substrate includes a buried silicon oxide layer 2b.

The SOI substrate obtained does not require additional polishing as is the case in the techniques of the prior art, in particular the techniques known as “BESOI” and “SMART CUT”.

Finally, the silicon body 1a is not lost and can be recycled to be used. For example, the silicon body 1a may be used as a silicon body for the fabrication of the elements A or B.

FIGS. 2a to 2e show the main steps of a variant of the method described above. The method of this variant differs from the method described in relation to FIGS. 1a to 1e in that a thin silicon oxide layer 4a has been made to grow on the thin silicon layer 3a of the first element A above. The thin silicon oxide layer 4a may be grown by thermal oxidation. This may produce a first element A comprising a silicon substrate 1a, a main surface of which is coated with a buffer layer 2a made of germanium, or of a silicon-germanium alloy, a thin silicon layer 3a, and finally, with a thin silicon oxide layer 4a, in that order.

The second element B, shown in FIG. 2b, is identical to that of the previous method.

The first element A and the second element B are then bonded as above, such that the silicon oxide layer 4a of the first element A is in contact with the silicon layer 2b of the second element B, as shown in FIG. 2c.

Although, in this case, the first element A and the second element B can be bonded by means of Van der Waals forces, it is preferable to subject the assembly to a thermal treatment so that the elements have a good mechanical bond. For example, the assembly can be heated to a temperature of 1000° C. for a duration of about 30 minutes (as in the BESOI technology).

The method is finished as above and as shown in FIGS. 2d and 2e, by removing the buffer layer, so as to obtain an SOI substrate having a buried silicon layer produced by the bonding of the silicon oxide layers 3a and 2b of the first and second elements, and a reuseable silicon substrate 1a.

By proceeding in this way, it is possible to further improve the quality of the interface between the buried silicon oxide layer 4a, 2b, and the thin silicon layer 3a thereabove.

In another variant of the method of the invention, it is possible to proceed in the same way as described in connection with FIGS. 2a to 2e, but by using a second element B consisting solely of a silicon substrate.

Patent Citations
Cited PatentFiling datePublication dateApplicantTitle
US5218213Jun 1, 1992Jun 8, 1993Harris CorporationSOI wafer with sige
US5476813Nov 14, 1994Dec 19, 1995Kabushiki Kaisha ToshibaMethod of manufacturing a bonded semiconductor substrate and a dielectric isolated bipolar transistor
US5906708Dec 6, 1995May 25, 1999Lawrence Semiconductor Research Laboratory, Inc.Vapor depositing an etching-stop dielectric layer
US6100166Dec 18, 1997Aug 8, 2000Canon Kabushiki KaishaProcess for producing semiconductor article
US6143628Mar 25, 1998Nov 7, 2000Canon Kabushiki KaishaSemiconductor substrate and method of manufacturing the same
US6294478Feb 27, 1997Sep 25, 2001Canon Kabushiki KaishaFabrication process for a semiconductor substrate
US6534382Aug 8, 2000Mar 18, 2003Canon Kabushiki KaishaProcess for producing semiconductor article
EP0371862A2Nov 27, 1989Jun 6, 1990The University Of North Carolina At Chapel HillMethod of forming a nonsilicon semiconductor on insulator structure
EP0779649A2Dec 11, 1996Jun 18, 1997Canon Kabushiki KaishaFabrication process and fabrication apparatus of SOI substrate
WO1996015550A1Oct 26, 1995May 23, 1996Lawrence Semiconductor ResearcSilicon-germanium-carbon compositions and processes thereof
Non-Patent Citations
Reference
1French Search Report, French Application No. 9907496; Prepared Feb. 29, 2000.
Classifications
U.S. Classification438/455, 438/458, 438/457, 438/464
International ClassificationH01L21/762, H01L21/30
Cooperative ClassificationH01L21/76251
European ClassificationH01L21/762D8
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Jan 3, 2011FPAYFee payment
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Effective date: 20020228
Owner name: FRANCE TELECOM, FRANCE
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Owner name: FAHRENHEIT THERMOSCOPE LLC, NEVADA
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