|Publication number||USRE42292 E1|
|Application number||US 12/413,626|
|Publication date||Apr 12, 2011|
|Filing date||Mar 30, 2009|
|Priority date||Aug 19, 1998|
|Also published as||US6239456, US6750485, US6794214, US20010052605, US20030213984, USRE41340, USRE44482|
|Publication number||12413626, 413626, US RE42292 E1, US RE42292E1, US-E1-RE42292, USRE42292 E1, USRE42292E1|
|Inventors||Vladimir Berezin, Alexander I. Krymski, Eric R. Fossum|
|Original Assignee||Round Rock Research, Llc|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (52), Non-Patent Citations (4), Referenced by (5), Classifications (30), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
This applicationNotice: More than one reissue application has been filed for the reissue of U.S. Pat. No. 6,794,214. The reissue applications are application Ser. No. 12/413,626 (the present application), which is a divisional reissue application of reissue application Ser. No. 11/524,495, which is a reissue of U.S. Pat. No. 6,794,214, issued on Sep. 21, 2004. U.S. Pat. No. 6,794,214 is a continuation of U.S. patent application Ser. No. 09/378,565, filed Aug. 19, 1999 now U.S. Pat. No. 6,239,456, which claims the benefit of the U.S. Provisional Application No. 60/097,135, filed on Aug. 19, 1998, which is incorporated herein by reference.
Certain applications require measuring aspects that are based on the speed of light.
For example, range finding can be carried out using optics. An optical signal is sent. The reflection therefrom is received. The time that it takes to receive the reflection of the optical signal gives an indication of the distance.
The so called lock-in technique uses an encoded temporal pattern as a signal reference. The device locks into the received signal to find the time of receipt. However, noise can mask the temporal pattern.
A lock in photodetector based on charged coupled devices or CCDs has been described in Miagawa and Kanada “CCD based range finding sensor” IEEE Transactions on Electronic Devices, volume 44 pages 1648-1652 1997.
CCDs are well known to have relatively large power consumption.
The present application describes a special kind of lock in detector formed using CMOS technology. More specifically, a lock in detector is formed from a pinned photodiode. The photodiode is modified to enable faster operation.
It is advantageous to obtain as much readout as possible to maximize the signal to noise ratio. The pinned photodiode provides virtually complete charge transfer readout.
Fast separation of the photo-generated carriers is obtained by separating the diode into smaller sub-parts and summing the output values of the subparts to obtain an increased composite signal.
These an other aspects will now be described in detail with reference to the accompanying drawings, wherein:
The present application uses a special, multiple output port pinned photodiode as the lock in pixel element. The photodiode is preferably part of a CMOS active pixel image sensor, of the type described in U.S. Pat. No. 5,471,505. Hence, the system preferably includes in-pixel buffer transistors and selection transistors, in addition to the CMOS photodetector.
Pinned photodiodes are well known in the art and described in U.S. Pat. No. 5,904,493. A pinned photodiode is also known as a hole accumulation diode or HAD, or a virtual phase diode or VP diode. Advantages of these devices are well known in the art. They have small dark current due to suppression of surface generation. They have good quantum efficiency since there are few or no polysilicon gates over the photosensitive region. Pinned photodiodes can also be made into smaller pixels because they have fewer gates.
The basic structure of the pinned photodiode lock in pixel is shown in FIG. 1. Four switched integrators are formed respectively at four output ports. Each gate is enabled during a specified period. The different integrators integrate carriers accumulated during the different periods. The first integrator accumulates carriers between 0 and π/2, the second between π/2 and π, the third between π and 3π/2 and the fourth between 3π/2 and 2πtime slots.
Assuming the light to be a cosine phase, then the phase shift of the detected light is given by
where L1, L2, L3 and L4 are the amplititudes of the samples from the respective first, second, third and fourth integrators. These four phases are obtained from the four outputs of the photodiode.
The first pinned photodiode 100 is connected to an output drain 102 via gate 1, element 104. This receives the charge for the first bin. Similarly, gates 2, 3 and 4 are turned on to integrate/bin from the second, third and fourth periods.
It is important to obtain as much signal as possible from the photodiode. This can be done by using a large photodiode. However, it can take the electrons a relatively long time to escape from a large photodetector.
The present system divides the one larger photodiode into a number of smaller diodes, each with multiple output ports.
A number of subpixels are formed. Each includes a number of pinned photodiodes 200, each with four ports. Each of the corresponding ports are connected together in a way that allows summing the outputs of the photodiodes. For example, all the gate 1 control lines are connected together as shown. The outputs from all the port 1s are also summed, and output as a simple composite output. Similarly, ports 2, 3 and 4's are all summed.
Assuming the operation frequency of modulated light is 10 megahertz with a 25 nanosecond integration slot, the generator carrier has a time of flight within this limit. This resolution time constrains the size of the detector. In addition, the characteristic diffusion time in a semiconductor device is L2/D, where D is the diffusion coefficient. This time originates from the continuity equation and the diffusion equation, and defines how soon the steady state will be established in the area of size L. Hence, for a 10 cm square per second electron diffusion coefficient, the characteristic size of the pinned photodiode could be less than 5 microns.
Other embodiments are also contemplated to exist within this disclosure. For example, other numbers of output ports, e.g. 2-8, are possible. While this application describes using a pinned photodiode, similar operations could be carried out with other CMOS photodetectors, e.g., photodiodes and photogates.
Such modifications are intended to be encompassed within the following claims.
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|U.S. Classification||438/57, 372/50.1, 372/50.21, 438/70, 348/302, 257/233, 438/78, 257/292, 372/50.12, 257/E27.132, 348/296, 257/232, 438/73, 438/59, 348/307, 257/E27.134|
|International Classification||H01L31/105, H01L31/062, H01L31/113, H01L31/101, G01S7/487, H01L27/148, H01L27/146|
|Cooperative Classification||H01L27/14643, H01L27/14601, H01L27/14609, G01S7/487|
|European Classification||H01L27/146A4, G01S7/487, H01L27/146A|
|Jan 4, 2010||AS||Assignment|
Owner name: ROUND ROCK RESEARCH, LLC, NEW YORK
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:023786/0416
Effective date: 20091223
|Feb 22, 2012||FPAY||Fee payment|
Year of fee payment: 8
|Apr 10, 2012||CC||Certificate of correction|