|Publication number||USRE42448 E1|
|Application number||US 11/848,231|
|Publication date||Jun 14, 2011|
|Filing date||Aug 30, 2007|
|Priority date||Dec 3, 2001|
|Also published as||CN1647367A, CN100459422C, US6603352, US6937096, US20030102915, US20040027199, WO2003049145A2, WO2003049145A3|
|Publication number||11848231, 848231, US RE42448 E1, US RE42448E1, US-E1-RE42448, USRE42448 E1, USRE42448E1|
|Inventors||James Stuart Wight, Johan M. Grundlingh|
|Original Assignee||Zarbana Digital Fund Llc|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (23), Non-Patent Citations (5), Classifications (15), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
This application is a continuation-in-part application of application Ser. No. 10/004,703 filed on 3 Dec. 2001 now U.S. Pat. No. 6.603,352.
The invention relates to circuitry for radio frequency (i.e. “RF” or “wireless”) transmitters and in particular to power amplifier circuitry providing signal combining integral to the power amplification.
Typically, power combiners are used in RF transmitters to combine the output signals of parallel power amplifiers into one high power RF output signal for wireless transmission. In these known transmitter structures the signals are first amplified by the power amplifiers and then they are combined by a power combiner to produce a combined amplified signal for transmission. Depending upon the circuit architecture and signal format used, however, it becomes necessary to make trade-offs between reducing power losses and achieving isolation between input signals of the combiner.
The need for efficiency is a particularly important design factor for the highly integrated requirements of transceivers used for wireless local area networks (LANs) and employing modulation formats such as OFDM (Orthogonal Frequency Division Multiplex). Moreover, the assignee of this invention and application has developed signal modulation methods, using OFDM signal format, whereby information signals are deconstructed into independent component signals, these independent signals being more efficiently processed and modulated than the original information signals from which they derive, and then the independent signals are up-converted, amplified and combined prior to transmission. Use of such independent modulated signals presents additional challenges to achieving efficiency at the amplification/combination stages of the transmitter, however, because the conventional model of amplification followed by combining, using known power amplifiers and combiners, is subject to inherent loss and isolation limitations.
Non-reciprocal combiners are considered to be non-economic for applications such as low cost wireless. Instead, reciprocal combiners, realized as either four-port or three-port structures, are available for use in such applications. Four-port combiners provide an advantage of isolation between the individual inputs (winch means that the output impedances of the amplifier stages do not load each other) but where the signals being amplified are non-identical (i.e. statistically independent) an inherent loss of 3 dB results (this loss disappears where the signals are identical due to resonance). Thus, four-port combiners are generally only suitable for use where the signals being amplified are identical.
A three-port combiner, also known as a trifilar, is able to provide a degree of isolation between its individual inputs, depending upon the output impedance of the amplifiers feeding it and the load impedance connected to the combiner's output. If the output impedances of the individual amplifiers and the output loading impedance of the combiner are the same, then isolation is not achieved and an inherent loss of 3 dB results. On the other hand, if the output impedances of the amplifiers are small in comparison with the output loading impedance of the combiner, then the inherent loss diminishes, and approaches 0 dB for 0 ohms output impedance.
The many classes of power amplifiers can be broadly sorted into two classifications; linear and switched-mode. Linear amplifiers provide an output-impedance resulting from the bias condition and load line for the active device (in the usual case, the active device being a transistor). In practice, this output impedance is typically in the range of 5 to 50 ohms. As a result, limited isolation is achievable when using a three-port combiner (trifilars) to combine the outputs of two linear amplifiers. As known by persons skilled in the art, a conventional class D, E or F switched-mode power amplifier consists of an input component having at least one active (switching) device, a central transformer component and an output component consisting of a resonator. It is impractical to apply the output signals of separate switched-mode amplifiers to a trifilar, to combine them, because of the cost and space requirements (and resulting inefficiency) associated with the multiple transformer windings required for such a design.
By reason of the foregoing limitations of known RF components, there exists a need for new and efficient means to achieve power amplification and combining of modulated signals in transmitters.
As disclosed in the parent application Ser. No. 10/004,703, a switched-mode power amplifier is configured for performing power amplification of a plurality of analog, phase-modulated signals input thereto and integrally combining those signals. Conceptually, this is achieved by replacing the input winding component(s) of the transformer within a conventional transformer-coupled voltage switching amplifier with separate input winding components, one for each input signal, in similar manner to the configuration of the input components of a conventional three-port combiner (trifilar). Accordingly, the input winding of the amplifier's transformer is comprised of a plurality of separate, series-coupled input component windings.
The inventors have found that the foregoing series-coupled input component windings, representing voltage sources of low output impedance, and output winding, can be replaced by a suitable impedance inverter so as that instead of representing low output impedance voltage sources they represent high output impedance current sources. Accordingly, in accordance with the present invention there is provided an alternative, parallel-coupled, switched-mode power amplifier configured for integrally amplifying and combining a plurality of signals (e.g. analog phase modulated signals) input thereto. The amplifier comprises an input component for each of the plurality of input signals. Each input component comprises at least one active device configured to be alternately switched by the input signal and to present an amplified signal corresponding to the input signal, such that each input component constitutes a low output impedance voltage source. An output resonator component connects to a load and an impedance inverter is provided between each input component and the resonator component. The impedance inverter is configured for transforming the low output impedance voltage source to a high output impedance current source so that the high output impedance sources produced by the input components can be combined in parallel, to produce a summation signal, before being passed to the resonator component.
The amplifier may be class D, E or F and may be a balanced or unbalanced-type amplifier. The impedance inverter may be a quarter-wavelength transmission line or a lumped element equivalent component, for example, comprising a series inductor and two shunt-to-ground, negative inductors of equal absolute value connected to each terminal end of the series inductance. In a semiconductor product implementation of the amplifier it is advantageous to incorporate the negative inductors into other reactive components of the amplifier. Moreover, in such implementation the series inductor may be provided by a spiral inductor as known in the art. However, as disclosed in a co-pending application assigned to the same assignee as this application, entitled “Integrated Circuit Incorporating Wire Bond Inductance” and filed on the same date as this continuation-in-part application, the content of which is incorporated herein by reference, the series inductor may instead be provided by means of a wire-bond (which takes advantage of an inherent, but heretofore undesirable property of wire-bonds).
In accordance with a further aspect of the invention there is provided a method for integrally amplifying and combining a plurality of input signals to produce a single amplified, summation signal for input to a resonator component. Each input signal is amplified by a separate amplifier input component to produce an amplified signal corresponding to the input signal and constituting a low output impedance voltage source. To perform the amplifying the input signal is applied to at least one active device of the input component to cause alternate switching of the active device. Each low output impedance voltage source is transformed to a high output impedance current source and the high output impedance sources are combined, in parallel, to produce the single amplified, summation signal.
The transforming is performed by a quarter-wavelength transmission line impedance inverter or lumped element equivalent component, for example, a series inductor and two shunt-to-ground, negative inductors of equal absolute value connected to each terminal end of the series inductance. Preferably, the negative inductors of the lumped element equivalent component are incorporated into other reactive components and the series inductor of the lumped element equivalent component is provided by means of a spiral inductor or wire-bond in a semiconductor product configured to implement this method.
Exemplary preferred embodiments of the invention, and variants thereof, are described in detail below with reference to the following drawings in which like references refer to like elements throughout:
FIGS. 3A(i), 3A(ii) and 3B illustrate switched-mode power amplifiers configured in accordance with the present invention for performing integral combining and amplification of the input signals (shown here as the two input signals Vin1 and Vin2);
FIG. 3A(i) illustrates a balanced switched-mode power amplifier for performing integral combining in accordance with the invention, wherein one half of the center-tapped winding of each input component of the amplifier is used for each half cycle of the signal input thereto (Vin1 and Vin2);
FIG. 3A(ii) illustrates a variant configuration of a balanced switched-mode power amplifier which differs from the design shown by FIG. 3A(i) in that the full winding of each input component of the amplifier is used for each half cycle of the signal input thereto (Vin1 and Vin2) i.e. instead of the center-tapped (i.e. half) windings of the embodiment shown by FIG. 3A(i);
Surprisingly, the inventor(s) invented and developed a means for achieving improved power amplification and power combining which provides greater efficiency over the known, successively staged power amplifier and combiner designs. Advantageously, the switched-mode amplifier of the present invention integrally performs power amplification and combining of signals input thereto. According to the invention multiple input signals are combined (summed) inside the power amplifier after they are amplified and before they are applied to the resonator component of the amplifier, and hence to a load impedance. This contrasts markedly with the known power amplifiers for which power combining takes place following the complete amplification process. A known (prior art) switched-mode power amplifier is illustrated by
The prior art switched-mode power amplifier shown by
The active devices 16 and 18 of the foregoing switched-mode amplifier never experience, simultaneously, a voltage across them and a current through them. Consequently, they present an output impedance that alternates between an open circuit and a short circuit. The output impedance for each individual active device is complementary to that of the other active device in that when one is an open circuit, the other is a short circuit. When an open circuit is presented to one component, 10 or 20, of the input winding 30 it does not load the transformer (since no current will flow through that particular input winding component 10 or 20) and the resulting composite impedance presented to the transformer is that of the short circuit (zero ohms) from the complementary input winding component 20 or 10, respectively. Note that this exemplary switched-mode amplifier uses voltage switching. An alternative to voltage switching is to use current switching which switches between a current source and an open circuit. However, in practice such alternative may be less desirable due to the need to provide a constant current source.
The inventor(s) discovered that this very low (theoretically zero) output impedance presented by the active devices 16, 18 of a switched-mode amplifier can be used advantageously to achieve a superposition i.e. combining of signal voltages. Specifically, the inventor(s) made a surprising discovery that such a superposition of voltage signals is achieved by replacing the center-tapped transformer of this switched-mode power amplifier with separate input stages in similar manner to a three-port combiner (trifilar).
An illustration of one embodiment of the invention is provided by FIG. 3A(i) from which it can be seen that the input winding 30 (consisting of winding halves 10 and 20) of the transformer of the prior art amplifier illustrated by
As shown by FIG. 3A(i), the signals Vin1, Vin1′ and Vin2, Vin2′ are fed to the active devices 82, 84 and 86, 88, respectively (whereby Vin1′ is the inverse of Vin1 and Vin2′ is the inverse of Vin2). Windings 72 and 74 see only the very low impedance (theoretically zero) of the active device which drives them (i.e. the active device which is switched on and presents a short circuit). The two input component windings 72 and 74 are coupled in series and, by superposition, the current waveforms generated within these windings by the two input voltage signals Vin1 and Vin2 are caused to superimpose and result in a summation of the two signals within the output winding 44 which is connected at one terminal end to ground and at the other terminal end to a resonator component 50, 60. This summation occurs within the amplifier before the amplified, summed signal is fed to the resonator component 50, 60 and hence to a load impedance 78. As such, a single amplifier resonator is shared between the two switched-mode amplifier input signals Vin1 and Vin2. Alternatively, in a different (optional) embodiment (not shown) both terminal ends of the output winding 44 may be connected to a resonator component in a balanced manner (instead of one terminal end being connected to ground as illustrated in FIG. 3A(i)).
The integrally combining amplifier of FIGS. 3A(i) and 3A(ii) achieves such combining of non-identical (independent) input signals Vin1 and Vin2 with low (theoretically zero) loss. It is to be understood that, although this illustrated embodiment uses only two input signals (Vin1 and Vin2, being analog, constant envelope phase modulated signals) a larger number of input signals (i.e. Vin1, Vin2, Vin3, . . . ) may be amplified in similar manner in accordance with the invention.
FIG. 3A(ii) illustrates a variant circuit design to that shown by FIG. 3A(i) wherein a bridge architecture is used for the amplifier input components 100 and 110 rather than the balanced architecture of the embodiment of FIG. 3A(i). In this embodiment the full input component winding 140, 150 of each input component 100 and 110, respectively, is used for each switched cycle of the signal input thereto (Vin1 and Vin2). This differs from the balanced architecture of the embodiment of FIG. 3A(i) in which half windings, only, are energized at any given time and, thus, the half windings must be highly coupled. As shown, for each input component 100 and 110 bridge-configured (i.e. cross-located) pairs of active devices (transistors) 112 and 118, 114 and 116 and 120 and 126, 122 and 124, respectively, are alternately switched between an open circuit and a short circuit. As a result, the direction of current flow through each of the windings 140, 150 is alternately switched every half cycle of the signal and the full winding is used each time. Therefore, this embodiment avoids the need to ensure highly coupled half windings associated with the embodiment of FIG. 3A(i).
A Class F amplifier is designed to provide a good approximation to a voltage square-wave across the output terminals of the active device. In theory it does so by “shorting” all even-harmonic voltages and “supporting” all odd-harmonic voltages, but in practice it is typical to process only the second harmonic voltage, or only the second and third harmonic voltages, accordingly. As a result, the voltage waveform across the output terminals of the active device contains only odd-harmonic components. In addition, this sorting of odd- and even-harmonics, which may be conveniently achieved (up to the third harmonic) with a series resonant circuit (at the second harmonic) connected across the active device's output terminals, and a parallel resonant circuit (at the third harmonic) connected between the active device's output terminal and the load, results in a current passing through the output terminals of the active device that contains the fundamental, and only even-harmonic components. The series resonator (consisting of L(2f) 270 and C(2f)280 for the Vin1 signal input component and L(2f) 272 and C(2f) 282 for the Vin2 signal input component in the circuit of
As shown by
Surprisingly, the inventor(s) found that the functionality of the input and output windings (i.e. the transformer component) of the foregoing amplifier circuit designs may be achieved, in equivalent manner, through the use of various equivalent (alternative) components located either directly within the circuit itself or indirectly external to the circuit but electronically within it, as detailed hereinafter. Advantageously, these equivalent components do not use a magnetic transformer and, thus, avoid the inherent significant loss which results from a magnetic transformer due the limited Q that can be achieved for coils on a semiconductor substrate.
In making this finding, the inventor(s) initially contemplated the well-known Wilkinson combiner circuit configuration shown by
Next, it was contemplated by the inventor(s) that the impedance inverter function provided by the foregoing transmission line equivalent, is also provided by the lumped element equivalent circuit shown by
For the particular amplifier circuit design shown in
The individual electronic and processing functions utilised in the foregoing described embodiment are, individually, well understood by those skilled in the art. It is to be understood by the reader that a variety of other implementations may be devised by skilled persons for substitution. Moreover, it will be readily understood by persons skilled in the art that a coil (inductor) component such as item 44 shown in FIG. 3A(i) can be provided by an equivalent plurality of smaller series-connected coils (i.e. rather than a unitary coil). The claimed invention herein is intended to encompass all such alternative implementations, substitutions and equivalents. Persons skilled in the field of electronic and communication design will be readily able to apply the present invention to an appropriate implementation for a given application.
Consequently, it is to be understood that the particular embodiments shown and described herein by way of illustration are not intended to limit the scope of the invention claimed by the inventors/assignee which is defined by the appended claims.
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|U.S. Classification||330/251, 330/124.00R, 330/207.00A|
|International Classification||H03F3/217, H03F3/21|
|Cooperative Classification||H03F2203/21172, H03F3/211, H03F2203/21157, H03F2200/541, H03F3/2173, H03F2200/537, H03F3/2178|
|European Classification||H03F3/217P, H03F3/217C, H03F3/21C|
|Mar 16, 2011||AS||Assignment|
Owner name: ICEFYRE SEMICONDUCTOR CORPORATION, CANADA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:J.S. WIGHT, INC.;REEL/FRAME:025971/0099
Effective date: 20011130
Owner name: J.S. WIGHT, INC., CANADA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:WIGHT, JAMES STUART;REEL/FRAME:025967/0046
Effective date: 20011130
Owner name: ZARBANA DIGITAL FUND LLC, DELAWARE
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:ICEFYRE SEMICONDUCTOR, INC.;REEL/FRAME:025971/0118
Effective date: 20051223
Owner name: ICEFYRE SEMICONDUCTOR, INC., CANADA
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:ICEFYRE SEMICONDUCTOR CORPORATION;REEL/FRAME:025971/0102
Effective date: 20051031
|Oct 11, 2011||CC||Certificate of correction|
|Aug 30, 2013||LAPS||Lapse for failure to pay maintenance fees|