|Publication number||USRE43265 E1|
|Application number||US 12/245,579|
|Publication date||Mar 27, 2012|
|Priority date||Aug 27, 2002|
|Also published as||US7116162, US20040070445|
|Publication number||12245579, 245579, US RE43265 E1, US RE43265E1, US-E1-RE43265, USRE43265 E1, USRE43265E1|
|Original Assignee||Jm Electronics Ltd. Llc|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (6), Classifications (11), Legal Events (2)|
|External Links: USPTO, USPTO Assignment, Espacenet|
This application claims priority to U.S. Provisional Patent Application Ser. No. 60/406,207, filed Aug. 27, 2002, the entire content of which is incorporated herein by reference.
This invention relates generally to multi-reference switching amplifiers and, in particular, to a simplified output topology associated with such amplifiers.
Multi-reference switching amplifiers of the type shown, for example, in PCT application PCT/US99/26691, entitled “Multi-Reference High Accuracy Switching Apparatus,” yield significantly higher instantaneous resolution than standard switching amplifiers. The cost for this performance improvement, however, resides in an additional regulatory device and one or two switching devices (for non-bridged or bridged configurations, respectively) per reference added.
Particularly in cost-sensitive applications, there remains a need for a simplified output topology that retains the function and resolution inherent in multi-reference switching amplifiers.
The present invention resides in a method and attendant circuitry for reducing the number of regulatory and switching devices in a multi-reference switching amplifier. In the preferred embodiment, multiple independently-modulated effective references are summed at a load through use of both linear and switched control of switching devices.
Referring now to
Data separator 101 isolates coarse data 102 and fine data 103 from incoming data stream 100. These data streams 102 and 103 are presented as inputs to pulsewidth modulators 104 and 105, which proportionally convert said coarse data 102 and fine data 103 into modulated coarse pulse stream 133 and fine pulse stream 134, respectively. If the sign 106 of the incoming data stream 100 is high, as indicated by data separator 101, switching device 125 is modulated by the coarse pulsewidth stream 133, through AND gate 107. While the sign 106 is high, transmission gate 109 is activated, forcing the control input of switching device 126 to follow the complement of coarse pulse width stream 133, as inverted by inverter 121. Resistor 119 serves to limit output current of differential amplifier 111.
Conversely, if the indicated sign 106 of the incoming data stream 110 is low; switching devices 127 and 128 are modulated by the coarse pulsewidth stream 133 (through AND gate 108) and its complement (through transmission gate 110 and inverter 121), respectively. Resistor 120 serves to limit output current of differential amplifier 112. Coarse modulation in this fashion operates exactly as shown in the multi-reference application referenced above.
A second reference voltage, proportional to the power supply voltage V+, is formed by the resistor divider 123/124, and input to differential amplifiers 111 and 112. When not disturbed by transmission gate 109, switching device 125, or diode 115, differential amplifier 111 outputs a voltage to cause the output of switching device 126 to equal the reference voltage formed by resistors 123 and 124. When the indicated sign 106 is low, NOR gate 113 turns on diode 115 with the inverse (from inverter 135) of the fine pulsewidth stream from pulsewidth modulator 105, forcing switching device 126 to turn on, through the resultant output increase of differential amplifier 111. This results in switching at the output of switching device 126 between ground and the reference voltage formed by resistors 123 and 124, inversely modulated by fine-resolution 103 provided to pulse width modulator 105.
When not disturbed by transmission gate 110, switching device 127, or diode 116, differential amplifier 112 outputs a voltage to cause the output of switching device 128 to equal the reference voltage formed by resistors 123 and 124. When the indicated sign 106 is high, NOR gate 114 turns on diode 116 with the inverse (from inverter 135) of the fine pulse width stream from pulse width modulator 105, forcing switching device 128 to turn on, through the resultant output increase of differential amplifier 112. This results in switching at the output of switching device 128 between ground and the reference voltage formed by resistors 123 and 124, inversely modulated by fine-resolution 103 provided to pulse width modulator 105.
In the discussion above, coarse-resolution data 102 is used to modulate V+ on one side of load 132, while fine-resolution data 103 is used to modulate the reference voltage formed by resistors 123 and 124 on the other side of load 132, under control of data sign 106. Although summation at the load of multiple references, modulated by appropriate resolutions, directly follows the technique disclosed in the multi-reference application referenced above, note that this is accomplished by the present invention with significantly fewer output switching devices.
|Cited Patent||Filing date||Publication date||Applicant||Title|
|US5438694||Aug 9, 1993||Aug 1, 1995||Motorola, Inc.||Distortion compensation for a pulsewidth-modulated circuit|
|US6492868||Aug 14, 2001||Dec 10, 2002||Larry Kirn||Dynamic range enhancement technique|
|US6509793||May 21, 2001||Jan 21, 2003||Larry Kim||Switching amplifier resolution enhancement apparatus and methods|
|US6535058||Nov 12, 1999||Mar 18, 2003||Jam Technologies, Llc||Multi-reference, high-accuracy switching amplifier|
|US7116162||Aug 27, 2003||Oct 3, 2006||Jam Technologies, Llc||Reduced output topology for multi-reference switching amplifiers|
|WO2000028658A1||Nov 12, 1999||May 18, 2000||Larry Kirn||Multi-reference, high-accuracy switching amplifier|
|U.S. Classification||330/10, 330/207.00A, 330/251|
|International Classification||H03F3/217, H03F3/38|
|Cooperative Classification||H03F3/38, H03F3/2173, H03F3/217|
|European Classification||H03F3/38, H03F3/217C, H03F3/217|
|Jan 14, 2011||AS||Assignment|
Effective date: 20071207
Owner name: JM ELECTRONICS LTD. LLC, DELAWARE
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:JAM TECHNOLOGIES, INC.;REEL/FRAME:025640/0192
Effective date: 20071114
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KIRN, LARRY;JAM TECHNOLOGIES, L.L.C.;REEL/FRAME:025640/0091
Owner name: JAM TECHNOLOGIES, INC., TEXAS
Owner name: JAM TECHNOLOGIES, LLC, MASSACHUSETTS
Effective date: 20040219
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KIRN, LARRY;REEL/FRAME:025639/0937
|Mar 26, 2014||FPAY||Fee payment|
Year of fee payment: 8