WO1998034457A3 - Method and apparatus for node pruning a multi-processor system for maximal, full connection during recovery - Google Patents

Method and apparatus for node pruning a multi-processor system for maximal, full connection during recovery Download PDF

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Publication number
WO1998034457A3
WO1998034457A3 PCT/US1998/001485 US9801485W WO9834457A3 WO 1998034457 A3 WO1998034457 A3 WO 1998034457A3 US 9801485 W US9801485 W US 9801485W WO 9834457 A3 WO9834457 A3 WO 9834457A3
Authority
WO
WIPO (PCT)
Prior art keywords
processors
processor system
maximal
full connection
during recovery
Prior art date
Application number
PCT/US1998/001485
Other languages
French (fr)
Other versions
WO1998034457A2 (en
Inventor
Murali Basavaiah
Karoor S Krishnakumar
Original Assignee
Tandem Computers Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tandem Computers Inc filed Critical Tandem Computers Inc
Priority to JP53476398A priority Critical patent/JP2001511278A/en
Priority to CA002279185A priority patent/CA2279185A1/en
Priority to EP98904697A priority patent/EP1012728A4/en
Publication of WO1998034457A2 publication Critical patent/WO1998034457A2/en
Publication of WO1998034457A3 publication Critical patent/WO1998034457A3/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G06F11/0724—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1415—Saving, restoring, recovering or retrying at system level
    • G06F11/142—Reconfiguring to eliminate the error
    • G06F11/1425—Reconfiguring to eliminate the error by reconfiguration of node membership
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs

Abstract

A method and apparatus for achieving maximal, full connection in a multi-processor system having a plurality of processors. Each of the multiple processors has a respective memory. The invention includes communicatively connecting the processors. Following a disruption (805) in the communicative connection, the invention collects connectivity information of one of the processors (830) and selects certain of the processors to cease operations, based on the connectivity information collected. The invention further communicates the selection to each of the processors (850) communicatively coupled to the one processor.
PCT/US1998/001485 1997-01-28 1998-01-27 Method and apparatus for node pruning a multi-processor system for maximal, full connection during recovery WO1998034457A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP53476398A JP2001511278A (en) 1997-01-28 1998-01-27 Method and apparatus for pruning a multiprocessor system for maximal total connections during recovery
CA002279185A CA2279185A1 (en) 1997-01-28 1998-01-27 Method and apparatus for node pruning a multi-processor system for maximal, full connection during recovery
EP98904697A EP1012728A4 (en) 1997-01-28 1998-01-27 Method and apparatus for node pruning a multi-processor system for maximal, full connection during recovery

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US08/790,030 US6002851A (en) 1997-01-28 1997-01-28 Method and apparatus for node pruning a multi-processor system for maximal, full connection during recovery
US08/790,030 1997-01-28
US08/790,269 US5991518A (en) 1997-01-28 1997-01-28 Method and apparatus for split-brain avoidance in a multi-processor system
US08/789,257 US5884018A (en) 1997-01-28 1997-01-28 Method and apparatus for distributed agreement on processor membership in a multi-processor system

Publications (2)

Publication Number Publication Date
WO1998034457A2 WO1998034457A2 (en) 1998-08-13
WO1998034457A3 true WO1998034457A3 (en) 1998-11-19

Family

ID=25149431

Family Applications (3)

Application Number Title Priority Date Filing Date
PCT/US1998/001379 WO1998033121A1 (en) 1997-01-28 1998-01-22 Method and apparatus for split-brain avoidance in a multi-process or system
PCT/US1998/001311 WO1998033120A1 (en) 1997-01-28 1998-01-23 Distributed agreement on processor membership in a multi-processor system
PCT/US1998/001485 WO1998034457A2 (en) 1997-01-28 1998-01-27 Method and apparatus for node pruning a multi-processor system for maximal, full connection during recovery

Family Applications Before (2)

Application Number Title Priority Date Filing Date
PCT/US1998/001379 WO1998033121A1 (en) 1997-01-28 1998-01-22 Method and apparatus for split-brain avoidance in a multi-process or system
PCT/US1998/001311 WO1998033120A1 (en) 1997-01-28 1998-01-23 Distributed agreement on processor membership in a multi-processor system

Country Status (5)

Country Link
US (3) US6002851A (en)
EP (3) EP1012717A4 (en)
JP (3) JP2001511922A (en)
CA (3) CA2279175A1 (en)
WO (3) WO1998033121A1 (en)

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Also Published As

Publication number Publication date
EP1012728A4 (en) 2005-07-20
JP2001511922A (en) 2001-08-14
EP0954783A1 (en) 1999-11-10
US6002851A (en) 1999-12-14
US5884018A (en) 1999-03-16
EP1012728A2 (en) 2000-06-28
CA2279185A1 (en) 1998-08-13
US5991518A (en) 1999-11-23
WO1998034457A2 (en) 1998-08-13
EP0954783A4 (en) 2005-10-26
WO1998033121A1 (en) 1998-07-30
WO1998033120A1 (en) 1998-07-30
CA2279175A1 (en) 1998-07-30
EP1012717A1 (en) 2000-06-28
JP2001509291A (en) 2001-07-10
EP1012717A4 (en) 2005-07-06
CA2275241A1 (en) 1998-07-30
JP2001511278A (en) 2001-08-07

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