WO1998055923A3 - A hardware design for majority voting, and testing and maintenance of majority voting - Google Patents

A hardware design for majority voting, and testing and maintenance of majority voting Download PDF

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Publication number
WO1998055923A3
WO1998055923A3 PCT/SE1998/000955 SE9800955W WO9855923A3 WO 1998055923 A3 WO1998055923 A3 WO 1998055923A3 SE 9800955 W SE9800955 W SE 9800955W WO 9855923 A3 WO9855923 A3 WO 9855923A3
Authority
WO
WIPO (PCT)
Prior art keywords
signals
majority
alarm
majority voting
control unit
Prior art date
Application number
PCT/SE1998/000955
Other languages
French (fr)
Other versions
WO1998055923A2 (en
Inventor
Stefan Hans Bertil Davidsson
Ola Per Martinsson
Carl Michael Carlsson
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Priority to AU80436/98A priority Critical patent/AU8043698A/en
Priority to JP50222899A priority patent/JP2002503371A/en
Priority to BR9809962-0A priority patent/BR9809962A/en
Priority to DE69816818T priority patent/DE69816818T2/en
Priority to EP98928701A priority patent/EP0986785B1/en
Publication of WO1998055923A2 publication Critical patent/WO1998055923A2/en
Publication of WO1998055923A3 publication Critical patent/WO1998055923A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/18Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/18Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/187Voting techniques
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1604Error detection or correction of the data by redundancy in hardware where the fault affects the clock signals of a processing unit and the redundancy is at or within the level of clock signal generation hardware

Abstract

The invention relates to majority voting. A number of input signals are monitored individually by separate monitors, one monitor for each signal. Each monitor generates a control signal representing the status of the monitored signal. The generated control signals are sent to a level control unit. The level control unit control the input levels to a majority voter according to the control signals. Instead of signals that are faulty, the level control unit selects signals of specific logical levels to be forwarded to the majority logic. The logical levels of these so called replacement signals are selected such that the replacement signals do not interfere with the remaining correct signals. Furthermore, the majority voted output signal is monitored so as to selectively generate an alarm. The voting functionality is tested by stopping input signals according to a first procedure, thus generating an alarm. By stopping input signals according to a second procedure, an alarm is avoided.
PCT/SE1998/000955 1997-06-06 1998-05-20 A hardware design for majority voting, and testing and maintenance of majority voting WO1998055923A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
AU80436/98A AU8043698A (en) 1997-06-06 1998-05-20 A hardware design for majority voting, and testing and maintenance of majority voting
JP50222899A JP2002503371A (en) 1997-06-06 1998-05-20 Majority hardware design and majority testing and maintenance
BR9809962-0A BR9809962A (en) 1997-06-06 1998-05-20 Majority voting circuit sensitive to at least three logic input signals, clock signal generation system, majority voting processes, to generate a main clock signal, and to test majority voting for a number of logical input signals, and, device to test majority voting for a number of logical input signals
DE69816818T DE69816818T2 (en) 1997-06-06 1998-05-20 MAJORITY DECISION DEVICE AND CORRESPONDING METHOD
EP98928701A EP0986785B1 (en) 1997-06-06 1998-05-20 Majority voting circuit and method therefor

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9702176-0 1997-06-06
SE9702176A SE9702176L (en) 1997-06-06 1997-06-06 A hardware design for majority elections, as well as testing and maintenance of majority elections

Publications (2)

Publication Number Publication Date
WO1998055923A2 WO1998055923A2 (en) 1998-12-10
WO1998055923A3 true WO1998055923A3 (en) 1999-03-04

Family

ID=20407288

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/SE1998/000955 WO1998055923A2 (en) 1997-06-06 1998-05-20 A hardware design for majority voting, and testing and maintenance of majority voting

Country Status (10)

Country Link
US (2) US6247160B1 (en)
EP (1) EP0986785B1 (en)
JP (1) JP2002503371A (en)
KR (1) KR20010013491A (en)
CN (1) CN1097775C (en)
AU (1) AU8043698A (en)
BR (1) BR9809962A (en)
DE (1) DE69816818T2 (en)
SE (1) SE9702176L (en)
WO (1) WO1998055923A2 (en)

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US6532550B1 (en) * 2000-02-10 2003-03-11 Westinghouse Electric Company Llc Process protection system
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TW567320B (en) * 2002-03-05 2003-12-21 Via Tech Inc Testing circuit for embedded phase lock loop and its testing method
US7225394B2 (en) * 2003-05-08 2007-05-29 Hewlett-Packard Development Company, L.P. Voting circuit
US7259602B2 (en) * 2005-07-21 2007-08-21 International Business Machines Corporation Method and apparatus for implementing fault tolerant phase locked loop (PLL)
US7317329B2 (en) * 2005-10-11 2008-01-08 Aten International Co., Ltd Lookup table circuit
DE102006025133A1 (en) * 2006-05-30 2007-12-06 Infineon Technologies Ag Storage and storage communication system
US7617412B2 (en) * 2006-10-25 2009-11-10 Rockwell Automation Technologies, Inc. Safety timer crosscheck diagnostic in a dual-CPU safety system
FR2928769B1 (en) * 2008-03-14 2012-07-13 Airbus France DEVICE FOR THE USE OF A PROGRAMMABLE COMPONENT IN A NATURAL RADIATION ENVIRONMENT
US8209591B2 (en) 2008-10-23 2012-06-26 Intersil Americas Inc. Voter tester for redundant systems
CN102141944B (en) * 2010-02-02 2012-12-12 慧荣科技股份有限公司 Method for reducing errors incapable of being corrected, memory device and controller thereof
US8972772B2 (en) * 2011-02-24 2015-03-03 The Charles Stark Draper Laboratory, Inc. System and method for duplexed replicated computing
US8729923B2 (en) * 2012-08-29 2014-05-20 Sandisk Technologies Inc. Majority vote circuit
US9632492B2 (en) 2015-01-23 2017-04-25 Rockwell Automation Asia Pacific Business Ctr. Pte., Ltd. Redundant watchdog method and system utilizing safety partner controller
US10084456B2 (en) 2016-06-18 2018-09-25 Mohsen Tanzify Foomany Plurality voter circuit
CN106567420A (en) * 2016-07-26 2017-04-19 中国航空工业集团公司西安飞行自动控制研究所 Triple-redundancy software control system of electrical transmission control excavator
JP2019061392A (en) * 2017-09-26 2019-04-18 ルネサスエレクトロニクス株式会社 Microcontroller and control method of microcontroller
CN110349392A (en) * 2019-06-20 2019-10-18 中国船舶重工集团公司第七一九研究所 Fire alarm installation and method
CN116074871A (en) * 2019-11-29 2023-05-05 华为技术有限公司 Clock fault positioning method and network equipment

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US5537583A (en) * 1994-10-11 1996-07-16 The Boeing Company Method and apparatus for a fault tolerant clock with dynamic reconfiguration
US5568097A (en) * 1995-09-25 1996-10-22 International Business Machines Inc. Ultra high availability clock chip

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US5305325A (en) * 1990-07-10 1994-04-19 Telefonaktiebolaget L M Ericsson Method and a device for supervising and testing majority voting
US5537583A (en) * 1994-10-11 1996-07-16 The Boeing Company Method and apparatus for a fault tolerant clock with dynamic reconfiguration
US5568097A (en) * 1995-09-25 1996-10-22 International Business Machines Inc. Ultra high availability clock chip

Also Published As

Publication number Publication date
BR9809962A (en) 2000-08-01
US6247160B1 (en) 2001-06-12
DE69816818D1 (en) 2003-09-04
AU8043698A (en) 1998-12-21
KR20010013491A (en) 2001-02-26
WO1998055923A2 (en) 1998-12-10
CN1097775C (en) 2003-01-01
SE9702176L (en) 1998-12-07
US6253348B1 (en) 2001-06-26
EP0986785A2 (en) 2000-03-22
DE69816818T2 (en) 2004-02-26
EP0986785B1 (en) 2003-07-30
SE9702176D0 (en) 1997-06-06
JP2002503371A (en) 2002-01-29
CN1259213A (en) 2000-07-05

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