WO1999026152A3 - Method and dedicated frame buffer for loop initialization and responses - Google Patents

Method and dedicated frame buffer for loop initialization and responses Download PDF

Info

Publication number
WO1999026152A3
WO1999026152A3 PCT/US1998/024558 US9824558W WO9926152A3 WO 1999026152 A3 WO1999026152 A3 WO 1999026152A3 US 9824558 W US9824558 W US 9824558W WO 9926152 A3 WO9926152 A3 WO 9926152A3
Authority
WO
WIPO (PCT)
Prior art keywords
responses
frame buffer
ports
dedicated
frames
Prior art date
Application number
PCT/US1998/024558
Other languages
French (fr)
Other versions
WO1999026152A2 (en
Inventor
Judy Lynn Westby
Original Assignee
Seagate Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seagate Technology filed Critical Seagate Technology
Priority to GB9928809A priority Critical patent/GB2341526B/en
Priority to DE19882822T priority patent/DE19882822T1/en
Priority to KR1020007005385A priority patent/KR100650818B1/en
Priority to JP2000521449A priority patent/JP2001523862A/en
Publication of WO1999026152A2 publication Critical patent/WO1999026152A2/en
Publication of WO1999026152A3 publication Critical patent/WO1999026152A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614—Improving the reliability of storage systems
    • G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0674—Disk device
    • G06F3/0676—Magnetic disk device
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0683—Plurality of storage devices
    • G06F3/0689—Disk arrays, e.g. RAID, JBOD
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/24—Testing correct operation
    • H04L1/245—Testing correct operation by using the properties of transmission codes
    • H04L1/246—Testing correct operation by using the properties of transmission codes two-level transmission codes, e.g. binary
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/02—Topology update or discovery
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/12—Shortest path evaluation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/48—Routing tree calculation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/901—Buffering arrangements using storage descriptor, e.g. read or write pointers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9031—Wraparound memory, e.g. overrun or underrun detection
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9063—Intermediate storage in different physical parts of a node or terminal
    • H04L49/9068—Intermediate storage in different physical parts of a node or terminal in the network interface card
    • H04L49/9073—Early interruption upon arrival of a fraction of a packet
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2007—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0038—System on Chip
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/012—Recording on, or reproducing or erasing from, magnetic disks

Abstract

A fibre-channel loop interface circuit that includes a dedicated transmit-frame buffer for loop initialization and responses ('responses' are non-data frames sent in response to commands or inquiries from other nodes). Having a dedicated transmit-frame buffer allows one port of a dual-port node to be transmitting initialization or response frames while another port is transmitting data frames, response frames, or initialization frames. Either or both ports can also be simultaneously receiving frames. The system includes a channel node having dual ports, each supporting a fibre-channel arbitrated-loop serial communications channel, and dedicated frame buffers within the channel node for loop initialization and responses. In some embodiments, the dedicated frame buffers are configured as on-chip buffers and include: two inbound non-data buffers (53, 53') coupled to the two ports, a data-frame buffer (55) coupled to both ports, and an outbound transmit-frame buffer coupled to at least one of the ports. In addition, a method for loop initialization and responses using the dedicated buffer is described.
PCT/US1998/024558 1997-11-17 1998-11-17 Method and dedicated frame buffer for loop initialization and responses WO1999026152A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
GB9928809A GB2341526B (en) 1997-11-17 1998-11-17 Method and dedicated frame buffer for loop initialization and responses
DE19882822T DE19882822T1 (en) 1997-11-17 1998-11-17 Method and dedicated frame buffer for loop initialization and for responses
KR1020007005385A KR100650818B1 (en) 1997-11-17 1998-11-17 Method and dedicated frame buffer for loop initialization and responses
JP2000521449A JP2001523862A (en) 1997-11-17 1998-11-17 Method and dedicated frame buffer for loop initialization and response

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
US6591997P 1997-11-17 1997-11-17
US6592697P 1997-11-17 1997-11-17
US6592097P 1997-11-17 1997-11-17
US6721197P 1997-12-01 1997-12-01
US60/065,926 1997-12-01
US60/065,919 1997-12-01
US60/067,211 1997-12-01
US60/065,920 1997-12-01

Publications (2)

Publication Number Publication Date
WO1999026152A2 WO1999026152A2 (en) 1999-05-27
WO1999026152A3 true WO1999026152A3 (en) 2002-03-07

Family

ID=27490525

Family Applications (3)

Application Number Title Priority Date Filing Date
PCT/US1998/024571 WO1999026137A1 (en) 1997-11-17 1998-11-17 Method and apparatus for using crc for data integrity in on-chip memory
PCT/US1998/024536 WO1999026151A1 (en) 1997-11-17 1998-11-17 Method and dedicated frame buffers for receiving frames
PCT/US1998/024558 WO1999026152A2 (en) 1997-11-17 1998-11-17 Method and dedicated frame buffer for loop initialization and responses

Family Applications Before (2)

Application Number Title Priority Date Filing Date
PCT/US1998/024571 WO1999026137A1 (en) 1997-11-17 1998-11-17 Method and apparatus for using crc for data integrity in on-chip memory
PCT/US1998/024536 WO1999026151A1 (en) 1997-11-17 1998-11-17 Method and dedicated frame buffers for receiving frames

Country Status (7)

Country Link
US (6) US6279057B1 (en)
JP (4) JP2001523862A (en)
KR (3) KR100650818B1 (en)
CN (3) CN1304520A (en)
DE (3) DE19882822T1 (en)
GB (3) GB2342021B (en)
WO (3) WO1999026137A1 (en)

Families Citing this family (127)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6356560B1 (en) * 1997-05-30 2002-03-12 Adtran, Inc. Arbitration mechanism for statistically multiplexed frame relay switching system
EP1059589B1 (en) * 1999-06-09 2005-03-30 Texas Instruments Incorporated Multi-channel DMA with scheduled ports
JP2001034427A (en) * 1999-07-23 2001-02-09 Fujitsu Ltd Device controller and its method
US6529945B1 (en) * 1999-07-26 2003-03-04 International Business Machines Corporation Data buffer management between two different systems
US6574696B1 (en) * 2000-03-07 2003-06-03 Hewlett-Packard Development Company, L.P. Methods and arrangements for providing bi-directional control between data storage drives and automation controllers
US6571367B1 (en) * 2000-03-15 2003-05-27 Emc Corporation Method and apparatus connecting between a fiber channel and a cache memory
US6622183B1 (en) * 2000-03-21 2003-09-16 Lsi Logic Corporation Data transmission buffer having frame counter feedback for re-transmitting aborted data frames
FR2812116A1 (en) * 2000-07-19 2002-01-25 Schlumberger Systems & Service Method and device for secured writing of data in rewritable memory, for use in microelectronics and chip cards
US7007097B1 (en) * 2000-07-20 2006-02-28 Silicon Graphics, Inc. Method and system for covering multiple resourcces with a single credit in a computer system
US6483843B1 (en) * 2000-10-12 2002-11-19 Emulex Corporation Detecting and counting open ordered sets originating from an attached node port
US6999460B1 (en) * 2000-10-16 2006-02-14 Storage Technology Corporation Arbitrated loop port switching
US6647528B1 (en) * 2000-11-02 2003-11-11 Computer Network Technology Corporation Fiber channel CRC for internal error checking on a switching platform
US6779150B1 (en) * 2000-12-21 2004-08-17 Emc Corporation CRC error detection system and method
US6868516B1 (en) 2000-12-21 2005-03-15 Emc Corporation Method for validating write data to a memory
US6934904B2 (en) * 2001-04-30 2005-08-23 Sun Microsystems, Inc. Data integrity error handling in a redundant storage array
US7016969B1 (en) * 2001-05-11 2006-03-21 Cisco Technology, Inc. System using weighted fairness decisions in spatial reuse protocol forwarding block to determine allowed usage for servicing transmit and transit traffic in a node
JP2002368768A (en) * 2001-06-05 2002-12-20 Hitachi Ltd Electronic device compatible with fiber channel arbitration loop and method for detecting fault in the fiber channel arbitration loop
US7065661B2 (en) * 2002-12-16 2006-06-20 Emc Corporation Using request and grant signals to read revision information from an adapter board that interfaces a disk drive
US6850410B2 (en) * 2001-06-29 2005-02-01 Emc Corporation Advanced technology attachment disk drive module with fibre channel system characteristics
JP3523616B2 (en) * 2001-07-24 2004-04-26 松下電器産業株式会社 Bus optimization method and communication node
US7215680B2 (en) * 2001-07-26 2007-05-08 Nishan Systems, Inc. Method and apparatus for scheduling packet flow on a fibre channel arbitrated loop
US20030135577A1 (en) * 2001-12-19 2003-07-17 Weber Bret S. Dual porting serial ATA disk drives for fault tolerant applications
US7433948B2 (en) 2002-01-23 2008-10-07 Cisco Technology, Inc. Methods and apparatus for implementing virtualization of storage within a storage area network
US7391723B2 (en) * 2002-04-22 2008-06-24 Computer Network Technology Corporation Frame-level fibre channel CRC on switching platform
US7808924B2 (en) 2002-05-24 2010-10-05 Cisco Technology, Inc. Apparatus and method for preventing disruption of fibre channel fabrics caused by ReConfigure Fabric (RCF) messages
US7664018B2 (en) 2002-07-02 2010-02-16 Emulex Design & Manufacturing Corporation Methods and apparatus for switching fibre channel arbitrated loop devices
US7397788B2 (en) * 2002-07-02 2008-07-08 Emulex Design & Manufacturing Corporation Methods and apparatus for device zoning in fibre channel arbitrated loop systems
US7630300B2 (en) * 2002-07-02 2009-12-08 Emulex Design & Manufacturing Corporation Methods and apparatus for trunking in fibre channel arbitrated loop systems
US7660316B2 (en) * 2002-07-02 2010-02-09 Emulex Design & Manufacturing Corporation Methods and apparatus for device access fairness in fibre channel arbitrated loop systems
US7171525B1 (en) * 2002-07-31 2007-01-30 Silicon Image, Inc. Method and system for arbitrating priority bids sent over serial links to a multi-port storage device
KR100457046B1 (en) * 2002-08-07 2004-11-10 삼성전자주식회사 Method for forming a contact in semiconductor device process
CA2497625A1 (en) * 2002-09-10 2004-03-25 Exagrid Systems, Inc. Method and apparatus for managing data integrity of backup and disaster recovery data
US7397768B1 (en) 2002-09-11 2008-07-08 Qlogic, Corporation Zone management in a multi-module fibre channel switch
US7220908B2 (en) * 2002-09-12 2007-05-22 Yamaha Corporation Waveform processing apparatus with versatile data bus
US6961786B2 (en) * 2002-09-25 2005-11-01 Lsi Logic Corporation Fiber loop linking/detecting
US20040123027A1 (en) * 2002-10-03 2004-06-24 Workman Michael Lee Systems and methods of multiple access paths to single ported storage devices
US20040068591A1 (en) * 2002-10-03 2004-04-08 Workman Michael Lee Systems and methods of multiple access paths to single ported storage devices
US7327680B1 (en) * 2002-11-05 2008-02-05 Cisco Technology, Inc. Methods and apparatus for network congestion control
US6829658B2 (en) 2002-12-16 2004-12-07 Emc Corporation Compatible signal-to-pin connector assignments for usage with fibre channel and advanced technology attachment disk drives
US7194673B2 (en) * 2002-12-20 2007-03-20 Emc Corporation Detecting intermittent losses of synchronization in a fibre channel loop
US7782784B2 (en) * 2003-01-10 2010-08-24 Cisco Technology, Inc. Port analyzer adapter
US7899048B1 (en) 2003-01-15 2011-03-01 Cisco Technology, Inc. Method and apparatus for remotely monitoring network traffic through a generic network
US7516272B2 (en) * 2003-03-28 2009-04-07 Emc Corporation Midplane-independent implementations of data storage system enclosures
US6961784B1 (en) * 2003-04-17 2005-11-01 Qlogic Corporation Method and system for processing non-data frames in host bus adapters
US7646767B2 (en) 2003-07-21 2010-01-12 Qlogic, Corporation Method and system for programmable data dependant network routing
JP4432388B2 (en) 2003-08-12 2010-03-17 株式会社日立製作所 I / O controller
US7234101B1 (en) 2003-08-27 2007-06-19 Qlogic, Corporation Method and system for providing data integrity in storage systems
US8165136B1 (en) 2003-09-03 2012-04-24 Cisco Technology, Inc. Virtual port based SPAN
US7474666B2 (en) 2003-09-03 2009-01-06 Cisco Technology, Inc. Switch port analyzers
US7134070B2 (en) * 2003-09-08 2006-11-07 Intel Corporation Checksum determination
US7573870B2 (en) * 2003-09-25 2009-08-11 Lsi Logic Corporation Transmit prioritizer context prioritization scheme
US7353448B1 (en) * 2003-10-21 2008-04-01 Marvell Semiconductor Israel Ltd. Methods, architectures, circuits and systems for transmission error determination
US7219263B1 (en) 2003-10-29 2007-05-15 Qlogic, Corporation Method and system for minimizing memory corruption
US20050114498A1 (en) * 2003-11-06 2005-05-26 International Business Machines Corporation Method and apparatus for managing data transfer in a data processing system
US7219325B1 (en) 2003-11-21 2007-05-15 Xilinx, Inc. Exploiting unused configuration memory cells
JP4426261B2 (en) * 2003-11-25 2010-03-03 株式会社日立製作所 Channel adapter and disk array device
US7934023B2 (en) 2003-12-01 2011-04-26 Cisco Technology, Inc. Apparatus and method for performing fast fibre channel write operations over relatively high latency networks
US7236361B2 (en) * 2003-12-22 2007-06-26 Emc Corporation Fan assembly for installing and removing fans individually and collectively
US7145776B2 (en) * 2003-12-22 2006-12-05 Emc Corporation Midplane-less data storage enclosure
US7231581B2 (en) * 2003-12-31 2007-06-12 Intel Corporation Communicating using a partial block in a frame
US7986630B1 (en) * 2004-02-09 2011-07-26 Lsi Corporation High performance architecture for fiber channel targets and target bridges
US20050187979A1 (en) * 2004-02-09 2005-08-25 Microsoft Corporation System and method for message-level connection management
US7434150B1 (en) 2004-03-03 2008-10-07 Marvell Israel (M.I.S.L.) Ltd. Methods, circuits, architectures, software and systems for determining a data transmission error and/or checking or confirming such error determinations
US7360142B1 (en) 2004-03-03 2008-04-15 Marvell Semiconductor Israel Ltd. Methods, architectures, circuits, software and systems for CRC determination
US7930377B2 (en) 2004-04-23 2011-04-19 Qlogic, Corporation Method and system for using boot servers in networks
US7669190B2 (en) 2004-05-18 2010-02-23 Qlogic, Corporation Method and system for efficiently recording processor events in host bus adapters
US9201599B2 (en) 2004-07-19 2015-12-01 Marvell International Ltd. System and method for transmitting data in storage controllers
US20060015659A1 (en) * 2004-07-19 2006-01-19 Krantz Leon A System and method for transferring data using storage controllers
US7719970B1 (en) * 2004-08-20 2010-05-18 Altera Corporation Serial communications system with optional data path and control plane features
US7577772B2 (en) 2004-09-08 2009-08-18 Qlogic, Corporation Method and system for optimizing DMA channel selection
US20060064531A1 (en) * 2004-09-23 2006-03-23 Alston Jerald K Method and system for optimizing data transfer in networks
US7676611B2 (en) 2004-10-01 2010-03-09 Qlogic, Corporation Method and system for processing out of orders frames
US7398335B2 (en) * 2004-11-22 2008-07-08 Qlogic, Corporation Method and system for DMA optimization in host bus adapters
US7164425B2 (en) * 2004-12-21 2007-01-16 Qlogic Corporation Method and system for high speed network application
US7392437B2 (en) 2005-01-20 2008-06-24 Qlogic, Corporation Method and system for testing host bus adapters
US7231480B2 (en) * 2005-04-06 2007-06-12 Qlogic, Corporation Method and system for receiver detection in PCI-Express devices
US7281077B2 (en) * 2005-04-06 2007-10-09 Qlogic, Corporation Elastic buffer module for PCI express devices
US7562284B2 (en) * 2005-08-26 2009-07-14 International Business Machines Corporation Apparatus, system, and method for mandatory end to end integrity checking in a storage system
KR100690274B1 (en) * 2005-09-12 2007-03-09 삼성전자주식회사 Cyclic redundancy check device and communication system comprising the same for multi-channel serial communication
US7660926B2 (en) * 2005-11-16 2010-02-09 Sun Microsystems, Inc. Apparatus and method for a core for implementing a communications port
US7694204B2 (en) * 2006-03-09 2010-04-06 Silicon Image, Inc. Error detection in physical interfaces for point-to-point communications between integrated circuits
US7461195B1 (en) 2006-03-17 2008-12-02 Qlogic, Corporation Method and system for dynamically adjusting data transfer rates in PCI-express devices
US7933735B2 (en) * 2007-01-31 2011-04-26 Denso Corporation Semiconductor integrated circuit
KR100902051B1 (en) * 2007-07-12 2009-06-15 주식회사 하이닉스반도체 Apparatus and method for generating error detection code
US7751350B1 (en) * 2007-08-03 2010-07-06 William George Pabst Full duplex network radio bridge with low latency and high throughput
US7787375B2 (en) * 2007-08-06 2010-08-31 International Business Machines Corporation Performing a recovery action in response to a credit depletion notification
US7975027B2 (en) * 2007-08-06 2011-07-05 International Business Machines Corporation Credit depletion notification for transmitting frames between a port pair
US8111610B2 (en) * 2008-01-25 2012-02-07 Emulex Design & Manufacturing Corporation Flagging of port conditions in high speed networks
US8566688B2 (en) * 2009-09-01 2013-10-22 Ensequence, Inc. Method of certifying multiple versions of an application
KR101069725B1 (en) * 2009-12-24 2011-10-04 주식회사 하이닉스반도체 Semiconductor Memory Apparatus, Control Circuit and Method for Fault Address Therefor
JP5651962B2 (en) * 2010-02-03 2015-01-14 富士通株式会社 RAID apparatus, abnormal device detection apparatus, and abnormal device detection method
CN102959902B (en) 2010-04-12 2017-06-13 高通股份有限公司 Detect the delimiter for carrying out low overhead communication in a network
JP4922442B2 (en) 2010-07-29 2012-04-25 株式会社東芝 Buffer management device, storage device including the same, and buffer management method
US8504893B1 (en) * 2010-09-30 2013-08-06 Micron Technology, Inc. Error detection or correction of a portion of a codeword in a memory device
GB2484717B (en) * 2010-10-21 2018-06-13 Advanced Risc Mach Ltd Security provision for a subject image displayed in a non-secure domain
CN102468915B (en) * 2010-11-16 2014-07-02 北京中电华大电子设计有限责任公司 Serial port 802.11n wireless network card chip sending path realization method
CN102158400B (en) * 2011-03-03 2013-12-04 北京航空航天大学 Communication interface of space-based route switching system and space-based route switching system
CN102999458A (en) * 2011-09-09 2013-03-27 中国航天科工集团第三研究院第八三五七研究所 High-speed intelligent serial port chip
CN102567276B (en) * 2011-12-19 2014-03-12 华为技术有限公司 Data transmission method based on multiple channels, related nodes and system
JP5937485B2 (en) * 2012-10-24 2016-06-22 富士通フロンテック株式会社 Transmitter
US9395924B2 (en) * 2013-01-22 2016-07-19 Seagate Technology Llc Management of and region selection for writes to non-volatile memory
US9569618B2 (en) * 2013-08-28 2017-02-14 Korea University Research And Business Foundation Server and method for attesting application in smart device using random executable code
CN103593261B (en) * 2013-10-17 2015-09-23 北京控制工程研究所 The quick recovery method of communication failure in a kind of interrupt service routine
US9467389B2 (en) 2014-04-28 2016-10-11 International Business Machines Corporation Handling large frames in a virtualized fibre channel over ethernet (FCoE) data forwarder
US9892065B2 (en) * 2015-05-20 2018-02-13 International Business Machines Corporation Adjustments of buffer credits for optimizing the number of retry operations and transfer ready operations
US10061734B2 (en) 2015-05-20 2018-08-28 International Business Machines Corporation Adjustment of buffer credits and other parameters in a startup phase of communications between a plurality of channels and a control unit
US9864716B2 (en) 2015-05-20 2018-01-09 International Business Machines Corporation Receiving buffer credits by a plurality of channels of one or more host computational devices for transmitting data to a control unit
CN106500739B (en) * 2016-11-18 2019-01-25 威科达（东莞）智能控制有限公司 A method of it is communicated with absolute value encoder
CN108572883B (en) * 2017-04-19 2021-06-18 北京金山云网络技术有限公司 Data correctness checking method and device
EP3404546B1 (en) 2017-05-16 2019-09-11 Melexis Technologies NV Device for supervising and initializing ports
CN107229858B (en) * 2017-05-19 2020-04-03 郑州云海信息技术有限公司 PECI bus master-slave machine verification system and method supporting crc8 verification
US11243880B1 (en) 2017-09-15 2022-02-08 Groq, Inc. Processor architecture
US11360934B1 (en) 2017-09-15 2022-06-14 Groq, Inc. Tensor streaming processor architecture
US11868804B1 (en) 2019-11-18 2024-01-09 Groq, Inc. Processor instruction dispatch configuration
US11114138B2 (en) 2017-09-15 2021-09-07 Groq, Inc. Data structures with multiple read ports
US11170307B1 (en) 2017-09-21 2021-11-09 Groq, Inc. Predictive model compiler for generating a statically scheduled binary with known resource constraints
CN107977284A (en) * 2017-11-30 2018-05-01 苏州麦迪斯顿医疗科技股份有限公司 A kind of data processing method, device, server and medium
JP7192244B2 (en) 2018-05-15 2022-12-20 株式会社デンソー repeater
US11455370B2 (en) 2018-11-19 2022-09-27 Groq, Inc. Flattened input stream generation for convolution with expanded kernel
US11115147B2 (en) * 2019-01-09 2021-09-07 Groq, Inc. Multichip fault management
CN110518978B (en) * 2019-07-23 2022-12-27 中国航空无线电电子研究所 Hybrid data transmission assembly based on optical fiber link
CN113037428B (en) * 2019-12-09 2022-01-25 大唐移动通信设备有限公司 Data flow processing method and device
CN111966627B (en) * 2020-08-13 2023-06-30 北京中航通用科技有限公司 8B/9B encoding and decoding method for serial bus
TWI778644B (en) * 2021-05-31 2022-09-21 新唐科技股份有限公司 Soc and data burning method thereof
US11855655B2 (en) * 2021-09-28 2023-12-26 Texas Instruments Incorporated Serial communications module with CRC
CN114117980B (en) * 2022-01-25 2022-06-07 飞腾信息技术有限公司 Chip design method, chip design module, electronic device, and medium
US20230236756A1 (en) * 2022-01-25 2023-07-27 Infineon Technologies Ag Buffer management in an ethernet switch

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5535035A (en) * 1994-09-15 1996-07-09 International Business Machines Corporation Optical fiber ring communications system and communications method
US5598541A (en) * 1994-10-24 1997-01-28 Lsi Logic Corporation Node loop port communication interface super core for fibre channel
US5617425A (en) * 1993-05-26 1997-04-01 Seagate Technology, Inc. Disc array having array supporting controllers and interface
US5694615A (en) * 1995-06-26 1997-12-02 Hewlett Packard Company Storage system having storage units interconnected to form multiple loops to provide simultaneous access from multiple hosts
US5802080A (en) * 1996-03-28 1998-09-01 Seagate Technology, Inc. CRC checking using a CRC generator in a multi-port design

Family Cites Families (79)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4486739A (en) 1982-06-30 1984-12-04 International Business Machines Corporation Byte oriented DC balanced (0,4) 8B/10B partitioned block transmission code
US4654654A (en) * 1983-02-07 1987-03-31 At&T Bell Laboratories Data network acknowledgement arrangement
GB8606217D0 (en) 1986-03-13 1986-04-16 Univ Strathclyde Local area network priority control system
US4933785A (en) 1988-03-01 1990-06-12 Prairietek Corporation Disk drive apparatus using dynamic loading/unloading
US5168568A (en) * 1989-02-06 1992-12-01 Compaq Computer Corporation Delaying arbitration of bus access in digital computers
US5187780A (en) * 1989-04-07 1993-02-16 Digital Equipment Corporation Dual-path computer interconnect system with zone manager for packet memory
US5170466A (en) * 1989-10-10 1992-12-08 Unisys Corporation Storage/retrieval system for document
US5235482A (en) 1989-11-09 1993-08-10 Rodime Plc Magnetic disk drive incorporating a mechanically damped base
US5034837A (en) 1989-11-09 1991-07-23 Rodime Plc Magnetic disk drive incorporating a magnetic actuator lock and a very small form factor
US5418716A (en) 1990-07-26 1995-05-23 Nec Corporation System for recognizing sentence patterns and a system for recognizing sentence patterns and grammatical cases
US5172538A (en) 1991-09-05 1992-12-22 Luger Linda S Stirrup pad
JP2624064B2 (en) 1991-11-29 1997-06-25 日本電気株式会社 Load / unload mechanism
JPH05166322A (en) 1991-12-16 1993-07-02 Nec Ibaraki Ltd Loading/unloading mechanism for magnetic head
JPH05244160A (en) * 1992-02-28 1993-09-21 Toshiba Corp Bridge device having frame deleting function
US5260933A (en) 1992-05-15 1993-11-09 International Business Machines Corporation Acknowledgement protocol for serial data network with out-of-order delivery
US5772597A (en) 1992-09-14 1998-06-30 Sextant Medical Corporation Surgical tool end effector
US5341260A (en) 1992-12-04 1994-08-23 Seagate Technology, Inc. Reduced torque unloading ramp system for a hard disk drive
EP0681721B1 (en) 1993-02-01 2005-03-23 Sun Microsystems, Inc. Archiving file system for data servers in a distributed network environment
JP3264465B2 (en) 1993-06-30 2002-03-11 株式会社日立製作所 Storage system
JPH0728746A (en) * 1993-07-14 1995-01-31 Fuji Xerox Co Ltd Data transfer device
JPH0863920A (en) 1993-08-24 1996-03-08 Sony Corp Loading/unloading device and its drive controller
US5668809A (en) * 1993-10-20 1997-09-16 Lsi Logic Corporation Single chip network hub with dynamic window filter
US5448566A (en) 1993-11-15 1995-09-05 International Business Machines Corporation Method and apparatus for facilitating communication in a multilayer communication architecture via a dynamic communication channel
GB9401092D0 (en) * 1994-01-21 1994-03-16 Newbridge Networks Corp A network management system
FR2719552B1 (en) * 1994-05-04 1996-07-26 Eurocopter France Rectifier blade for anti-torque device with rotor and stator rectifier faired from helicopter.
US5455723A (en) 1994-06-02 1995-10-03 International Business Machines Corporation Method and apparatus for ramp load and unload
JPH0844649A (en) * 1994-07-26 1996-02-16 Hitachi Ltd Data processor
US5828522A (en) 1994-09-13 1998-10-27 International Business Machines Corporation Velocity control of head load/unload mechanism in a disk drive using dither
EP0729612A1 (en) * 1994-09-16 1996-09-04 Koninklijke Philips Electronics N.V. Microcontroller having a page address mode
JPH0897803A (en) 1994-09-26 1996-04-12 Nec Eng Ltd Data transmission system
US5619647A (en) 1994-09-30 1997-04-08 Tandem Computers, Incorporated System for multiplexing prioritized virtual channels onto physical channels where higher priority virtual will pre-empt a lower priority virtual or a lower priority will wait
US5638518A (en) * 1994-10-24 1997-06-10 Lsi Logic Corporation Node loop core for implementing transmission protocol in fibre channel
US5617541A (en) * 1994-12-21 1997-04-01 International Computer Science Institute System for packetizing data encoded corresponding to priority levels where reconstructed data corresponds to fractionalized priority level and received fractionalized packets
US5619497A (en) 1994-12-22 1997-04-08 Emc Corporation Method and apparatus for reordering frames
US5590006A (en) 1994-12-23 1996-12-31 International Business Machines Corporation One-sided, single platter hard disk with center parking features
US5812564A (en) 1995-05-08 1998-09-22 Western Digital Corporation Disk drive with embedded finite field processor for error correction
US5831795A (en) 1995-05-10 1998-11-03 Iomega Corporation Head loading mechanism for a disk drive
US5815662A (en) 1995-08-15 1998-09-29 Ong; Lance Predictive memory caching for media-on-demand systems
JPH0955718A (en) * 1995-08-17 1997-02-25 Nec Corp Data communication device
US5768623A (en) 1995-09-19 1998-06-16 International Business Machines Corporation System and method for sharing multiple storage arrays by dedicating adapters as primary controller and secondary controller for arrays reside in different host computers
CA2182539A1 (en) 1995-09-29 1997-03-30 Nandakumar Natarajan Method and apparatus for buffer management
DE69618439D1 (en) 1995-10-10 2002-02-14 Koninkl Philips Electronics Nv INFORMATION STORAGE SYSTEM WITH ELECTROMAGNETIC LIFTING DEVICE
US5778426A (en) 1995-10-23 1998-07-07 Symbios, Inc. Methods and structure to maintain a two level cache in a RAID controller and thereby selecting a preferred posting method
US5864448A (en) 1995-10-24 1999-01-26 International Business Machines Corporation Slider and suspension retention and retraction system for high capacity disk drive
US5822782A (en) 1995-10-27 1998-10-13 Symbios, Inc. Methods and structure to maintain raid configuration information on disks of the array
US5805920A (en) 1995-11-13 1998-09-08 Tandem Computers Incorporated Direct bulk data transfers
JPH09149034A (en) * 1995-11-20 1997-06-06 Nec Eng Ltd Atm cell generating method and communication controller
JPH09149067A (en) 1995-11-21 1997-06-06 Hitachi Cable Ltd Switching hub
US5758081A (en) 1995-12-08 1998-05-26 Aytac; Haluk M. Computing and communications transmitting, receiving system, with a push button interface, that is continously on, that pairs up with a personal computer and carries out mainly communications related routine tasks
US5781801A (en) 1995-12-20 1998-07-14 Emc Corporation Method and apparatus for receive buffer management in multi-sender communication systems
US5809328A (en) 1995-12-21 1998-09-15 Unisys Corp. Apparatus for fibre channel transmission having interface logic, buffer memory, multiplexor/control device, fibre channel controller, gigabit link module, microprocessor, and bus control device
US5768530A (en) 1995-12-28 1998-06-16 Emc Corporation High speed integrated circuit interface for fibre channel communications
US5790773A (en) 1995-12-29 1998-08-04 Symbios, Inc. Method and apparatus for generating snapshot copies for data backup in a raid subsystem
US5787242A (en) 1995-12-29 1998-07-28 Symbios Logic Inc. Method and apparatus for treatment of deferred write data for a dead raid device
JP2689973B2 (en) * 1995-12-29 1997-12-10 日本電気株式会社 Switching hub device
US6115767A (en) * 1996-03-04 2000-09-05 Matsushita Electric Industrial Co., Ltd. Apparatus and method of partially transferring data through bus and bus master control device
US5819111A (en) 1996-03-15 1998-10-06 Adobe Systems, Inc. System for managing transfer of data by delaying flow controlling of data through the interface controller until the run length encoded data transfer is complete
US5663724A (en) 1996-03-28 1997-09-02 Seagate Technology, Inc. 16B/20B encoder
US5761705A (en) 1996-04-04 1998-06-02 Symbios, Inc. Methods and structure for maintaining cache consistency in a RAID controller having redundant caches
US5761534A (en) 1996-05-20 1998-06-02 Cray Research, Inc. System for arbitrating packetized data from the network to the peripheral resources and prioritizing the dispatching of packets onto the network
US5805788A (en) 1996-05-20 1998-09-08 Cray Research, Inc. Raid-5 parity generation and data reconstruction
US5787450A (en) 1996-05-29 1998-07-28 International Business Machines Corporation Apparatus and method for constructing a non-linear data object from a common gateway interface
US5764931A (en) 1996-05-31 1998-06-09 Sun Microsystems, Inc. Method and apparatus for passing bus mastership between processors using predefined bus mastership states
US5822143A (en) 1996-06-11 1998-10-13 Western Digital Corporation Decision feedback equalization implementation of partial-response signaling in a magnetic recording channel
US5790792A (en) 1996-09-04 1998-08-04 Radiant Systems, Inc. Method and apparatus for transmitting multimedia data from and application logic server to interactive multimedia workstations
JP2868080B2 (en) * 1996-09-12 1999-03-10 三菱電機株式会社 Communication monitoring control device and communication monitoring control method
US5812754A (en) 1996-09-18 1998-09-22 Silicon Graphics, Inc. Raid system with fibre channel arbitrated loop
US5889949A (en) * 1996-10-11 1999-03-30 C-Cube Microsystems Processing system with memory arbitrating between memory access requests in a set top box
US5930483A (en) * 1996-12-09 1999-07-27 International Business Machines Corporation Method and apparatus for communications control on a small computer system interface
US5917828A (en) * 1997-01-03 1999-06-29 Ncr Corporation ATM reassembly controller and method
US5978379A (en) * 1997-01-23 1999-11-02 Gadzoox Networks, Inc. Fiber channel learning bridge, learning half bridge, and protocol
US6172990B1 (en) * 1997-06-19 2001-01-09 Xaqti Corporation Media access control micro-RISC stream processor and method for implementing the same
US6061351A (en) * 1997-02-14 2000-05-09 Advanced Micro Devices, Inc. Multicopy queue structure with searchable cache area
US5875074A (en) 1997-04-18 1999-02-23 Quinta Corporation Adjustable head loading apparatus
JPH10302421A (en) 1997-04-28 1998-11-13 Internatl Business Mach Corp <Ibm> Suspension assembly and ramp block and head holding mechanism and disk drive
US6185207B1 (en) * 1997-06-19 2001-02-06 International Business Machines Corporation Communication system having a local area network adapter for selectively deleting information and method therefor
US6014380A (en) * 1997-06-30 2000-01-11 Sun Microsystems, Inc. Mechanism for packet field replacement in a multi-layer distributed network element
US6304910B1 (en) * 1997-09-24 2001-10-16 Emulex Corporation Communication processor having buffer list modifier control bits
US6226680B1 (en) * 1997-10-14 2001-05-01 Alacritech, Inc. Intelligent network interface system method for protocol processing

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5617425A (en) * 1993-05-26 1997-04-01 Seagate Technology, Inc. Disc array having array supporting controllers and interface
US5535035A (en) * 1994-09-15 1996-07-09 International Business Machines Corporation Optical fiber ring communications system and communications method
US5598541A (en) * 1994-10-24 1997-01-28 Lsi Logic Corporation Node loop port communication interface super core for fibre channel
US5694615A (en) * 1995-06-26 1997-12-02 Hewlett Packard Company Storage system having storage units interconnected to form multiple loops to provide simultaneous access from multiple hosts
US5802080A (en) * 1996-03-28 1998-09-01 Seagate Technology, Inc. CRC checking using a CRC generator in a multi-port design

Also Published As

Publication number Publication date
GB9928812D0 (en) 2000-02-02
KR20010032196A (en) 2001-04-16
WO1999026152A2 (en) 1999-05-27
DE19882830T1 (en) 2000-11-16
CN1123832C (en) 2003-10-08
CN1158605C (en) 2004-07-21
WO1999026137A1 (en) 1999-05-27
DE19882831T1 (en) 2001-03-22
CN1278933A (en) 2001-01-03
KR100564665B1 (en) 2006-03-29
GB2346784A (en) 2000-08-16
GB0009935D0 (en) 2000-06-07
JP2001523856A (en) 2001-11-27
CN1290364A (en) 2001-04-04
WO1999026151A1 (en) 1999-05-27
US6502189B1 (en) 2002-12-31
GB2341526A (en) 2000-03-15
JP2009151795A (en) 2009-07-09
JP4547452B2 (en) 2010-09-22
US6279057B1 (en) 2001-08-21
GB2342021B (en) 2002-12-31
US6324669B1 (en) 2001-11-27
KR100734649B1 (en) 2007-07-02
GB2342021A (en) 2000-03-29
JP4272813B2 (en) 2009-06-03
US6317800B1 (en) 2001-11-13
USRE42228E1 (en) 2011-03-15
CN1304520A (en) 2001-07-18
USRE40034E1 (en) 2008-01-22
KR20010032195A (en) 2001-04-16
KR20010032197A (en) 2001-04-16
DE19882822T1 (en) 2001-03-22
GB2341526B (en) 2003-01-15
GB2346784B (en) 2003-01-15
JP2001523861A (en) 2001-11-27
KR100650818B1 (en) 2006-11-27
GB9928809D0 (en) 2000-02-02
JP2001523862A (en) 2001-11-27

Similar Documents

Publication Publication Date Title
WO1999026152A3 (en) Method and dedicated frame buffer for loop initialization and responses
MY135481A (en) Data communication system, data communication method, and data communication apparatus
EP0119039A3 (en) Token access controller protocol and architecture
WO1995027353A3 (en) Simultaneous transmission of high and low speed signals
WO2000030294A3 (en) Software interface between switching module and operating system of a data packet switching system
MY134351A (en) Communications system
WO1996009708A3 (en) Simultaneous transmission of speech and data on a mobile communications system
CA2051818A1 (en) Simultaneous voice and data system using the existing two-wire interface
MY128864A (en) Data communication system and data communication apparatus
AU5098300A (en) An element for a communications system
CA2051910A1 (en) Circuit for testing digital lines
MY137655A (en) System and method to communicate between a host and a modem
CA2254573A1 (en) Frame relay-to-atm interface circuit and method of operation
WO2002080421A8 (en) Alignment of tdm-based signals
EP1231736A3 (en) Wireless data communication
CA2113917A1 (en) Data communication receiver having variable length message carry-on
CA2025950A1 (en) Duplex structure signal transfer point system for common channel signalling system no. 7
CA2303024A1 (en) Apparatus and method for protocol application data frame operation requests interfacing with an input/output device
TW331058B (en) Repeater using shared receiver demand priority access method
SE0002122L (en) Current differential relay device
FR2715788B1 (en) Communication on digital network, with anti-virus.
CA2262395A1 (en) Loop data transmission system
JPS6473840A (en) Data transmission system between local area networks
SE9901302D0 (en) Method and apparatus in a communication network
WO1999065178A3 (en) A communications network and method for framing point-to-point frame structures

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 98811240.X

Country of ref document: CN

AK Designated states

Kind code of ref document: A2

Designated state(s): CN DE GB JP KR SG

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
ENP Entry into the national phase

Ref document number: 9928809

Country of ref document: GB

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: 2000 521449

Country of ref document: JP

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 1020007005385

Country of ref document: KR

RET De translation (de og part 6b)

Ref document number: 19882822

Country of ref document: DE

Date of ref document: 20010322

WWE Wipo information: entry into national phase

Ref document number: 19882822

Country of ref document: DE

WWP Wipo information: published in national office

Ref document number: 1020007005385

Country of ref document: KR

AK Designated states

Kind code of ref document: A3

Designated state(s): CN DE GB JP KR SG

WWG Wipo information: grant in national office

Ref document number: 1020007005385

Country of ref document: KR