WO1999030457A3 - Method and apparatus for variable bit rate clock recovery - Google Patents

Method and apparatus for variable bit rate clock recovery Download PDF

Info

Publication number
WO1999030457A3
WO1999030457A3 PCT/US1998/025524 US9825524W WO9930457A3 WO 1999030457 A3 WO1999030457 A3 WO 1999030457A3 US 9825524 W US9825524 W US 9825524W WO 9930457 A3 WO9930457 A3 WO 9930457A3
Authority
WO
WIPO (PCT)
Prior art keywords
bit rate
data signal
variable bit
narrow
band filter
Prior art date
Application number
PCT/US1998/025524
Other languages
French (fr)
Other versions
WO1999030457A2 (en
Inventor
Thomas C Banwell
Nim K Cheung
Original Assignee
Telcordia Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telcordia Tech Inc filed Critical Telcordia Tech Inc
Priority to JP2000524893A priority Critical patent/JP3615148B2/en
Priority to DE69832214T priority patent/DE69832214T2/en
Priority to EP98960624A priority patent/EP1389382B1/en
Priority to AU16180/99A priority patent/AU744341B2/en
Priority to CA002312491A priority patent/CA2312491C/en
Publication of WO1999030457A2 publication Critical patent/WO1999030457A2/en
Publication of WO1999030457A3 publication Critical patent/WO1999030457A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0262—Arrangements for detecting the data rate of an incoming signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions

Abstract

Methods and apparatuses consistent with the present invention recover a clock signal (160) from a variable bit rate data signal by estimating, in the time domain, the bit rate of the data signal, and based on the estimated variable bit rate, determining a center frequency of a narrow-band filter (330) for extracting the clock signal from the data signal (155). A clock recovery circuit (300) consistent with the present invention extracts a clock signal from a variable bit rate data signal by estimating a minimum time interval between transition (320) in the data signal, generating a plurality of pulses that correspond respectively to transitions in the data signal, adjusting the duration of each of the pulses based on the estimated minimum time interval (310) and inputting into a narrow-band filter (320) the adjusted pulses (RS2), determining the center frequency of the narrow-band filter (320) based on the estimated minimum time interval, and extracting in the narrow-band filter (320) the clock signal (160) from the adjusted pulses.
PCT/US1998/025524 1997-12-05 1998-12-02 Method and apparatus for variable bit rate clock recovery WO1999030457A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2000524893A JP3615148B2 (en) 1997-12-05 1998-12-02 Method and apparatus for recovering variable bit rate clock
DE69832214T DE69832214T2 (en) 1997-12-05 1998-12-02 METHOD AND DEVICE FOR VARIABLE BITRATE RECONSTRUCTION
EP98960624A EP1389382B1 (en) 1997-12-05 1998-12-02 Method and apparatus for variable bit rate clock recovery
AU16180/99A AU744341B2 (en) 1997-12-05 1998-12-02 Method and apparatus for variable bit rate clock recovery
CA002312491A CA2312491C (en) 1997-12-05 1998-12-02 Method and apparatus for variable bit rate clock recovery

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US6739797P 1997-12-05 1997-12-05
US60/067,397 1997-12-05

Publications (2)

Publication Number Publication Date
WO1999030457A2 WO1999030457A2 (en) 1999-06-17
WO1999030457A3 true WO1999030457A3 (en) 2003-12-11

Family

ID=22075740

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1998/025524 WO1999030457A2 (en) 1997-12-05 1998-12-02 Method and apparatus for variable bit rate clock recovery

Country Status (11)

Country Link
US (1) US6285722B1 (en)
EP (1) EP1389382B1 (en)
JP (1) JP3615148B2 (en)
KR (1) KR100385005B1 (en)
CN (1) CN1134948C (en)
AU (1) AU744341B2 (en)
CA (1) CA2312491C (en)
DE (1) DE69832214T2 (en)
ID (1) ID26836A (en)
TW (1) TW494662B (en)
WO (1) WO1999030457A2 (en)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999034638A1 (en) * 1997-12-23 1999-07-08 Nokia Networks Oy Clock generating method and apparatus for an asynchronous transmission
US6549572B1 (en) * 1998-05-13 2003-04-15 Telcordia Technologies, Inc. Method and apparatus for automated time domain monitoring in optical networks
US6377618B1 (en) * 1998-12-30 2002-04-23 Agere Systems Guardian Corp. Auto-correlation system and method for rate detection of a data communication channel
US6389548B1 (en) * 1999-04-12 2002-05-14 Liam Bowles Pulse run-length measurement for HF data signal by dividing accumulated phase difference between first and second zero-crossings by single-cycle range using multiple cycle range sawtooth waveform
KR100303315B1 (en) * 1999-08-05 2001-11-01 윤종용 Optical receivers with bit-rate independent clock and data recovery and method thereof
US6876991B1 (en) 1999-11-08 2005-04-05 Collaborative Decision Platforms, Llc. System, method and computer program product for a collaborative decision platform
FR2800951A1 (en) * 1999-11-10 2001-05-11 Koninkl Philips Electronics Nv ESTIMATING THE OPTIMUM SAMPLING INSTANT IN A TDMA PACKET TRANSMISSION SYSTEM
US7187721B1 (en) * 2000-02-09 2007-03-06 Rambus Inc. Transition-time control in a high-speed data transmitter
JP2001230824A (en) * 2000-02-18 2001-08-24 Matsushita Electric Ind Co Ltd Data reception system
DE10055474C2 (en) * 2000-11-09 2003-10-23 Siemens Ag Arrangement and method for automatic bandwidth-dependent billing in the telecommunications
US20020177912A1 (en) * 2001-05-21 2002-11-28 Sobiski Donald J. Endless operation without reset of a multi-stage control device with stages of finite range
US6988227B1 (en) 2001-06-25 2006-01-17 Silicon Laboratories Inc. Method and apparatus for bit error rate detection
US6856206B1 (en) * 2001-06-25 2005-02-15 Silicon Laboratories, Inc. Method and apparatus for acquiring a frequency without a reference clock
KR100634193B1 (en) * 2001-10-26 2006-10-16 인터내셔널 비지네스 머신즈 코포레이션 Transition detection, validation and memorization circuit
DE10301694B4 (en) * 2003-01-17 2006-03-23 Siemens Ag Method for detecting an erroneous sampling of a digital data signal
US7049869B2 (en) * 2003-09-02 2006-05-23 Gennum Corporation Adaptive lock position circuit
JP4351941B2 (en) * 2004-03-26 2009-10-28 株式会社アドバンテスト Test apparatus and test method
US7379830B2 (en) * 2004-05-25 2008-05-27 Tektronix, Inc. Period determination of a periodic NRZ signal
GB0414793D0 (en) * 2004-07-01 2004-08-04 Ttp Communications Ltd Determining characteristics of communications signals
US7573957B2 (en) * 2005-09-23 2009-08-11 Teradyne, Inc. Strobe technique for recovering a clock in a digital signal
US7856578B2 (en) * 2005-09-23 2010-12-21 Teradyne, Inc. Strobe technique for test of digital signal timing
WO2007038339A2 (en) * 2005-09-23 2007-04-05 Teradyne, Inc. Strobe technique for recovering a clock in a digital signal
US7574632B2 (en) * 2005-09-23 2009-08-11 Teradyne, Inc. Strobe technique for time stamping a digital signal
US7375591B2 (en) * 2006-08-04 2008-05-20 Silicon Laboratories Inc. Robust false locking prevention in referenceless frequency acquisition
TWI323409B (en) * 2006-09-08 2010-04-11 Nanya Technology Corp Apparatus and related method for controlling switch module in memory by detecting operating frequency of specific signal in memory
US7715512B2 (en) * 2006-09-26 2010-05-11 Advantest Corporation Jitter measurement apparatus, jitter measurement method, and recording medium
JP5343565B2 (en) * 2009-01-07 2013-11-13 富士通株式会社 Network equipment
US8432182B2 (en) 2009-03-30 2013-04-30 Analog Devices, Inc. USB isolator with advanced control features
CN101989907B (en) * 2009-07-31 2014-04-23 王知康 Internet clock synchronizing device and method
JP5393885B2 (en) * 2010-06-04 2014-01-22 三菱電機株式会社 Reception device, data identification / reproduction device, PON system, and data identification / reproduction method
US9946679B2 (en) 2011-10-05 2018-04-17 Analog Devices, Inc. Distributed audio coordination over a two-wire communication bus
JP5856306B2 (en) 2011-10-05 2016-02-09 アナログ・デバイシズ・インコーポレーテッド Two-wire communication system for high-speed data and power distribution
US10649948B2 (en) * 2011-10-05 2020-05-12 Analog Devices, Inc. Two-wire communication systems and applications
US9772665B2 (en) 2012-10-05 2017-09-26 Analog Devices, Inc. Power switching in a two-wire conductor system
JP2014216806A (en) * 2013-04-25 2014-11-17 株式会社日立製作所 Semiconductor device and information processing system
US9059724B2 (en) * 2013-07-08 2015-06-16 Analog Devices, Inc. Differential decoder
KR102472946B1 (en) * 2016-02-26 2022-12-05 에스케이하이닉스 주식회사 Signal Recovery Circuit
CN107565956B (en) * 2017-09-22 2020-06-30 哈尔滨工业大学 VCO (voltage controlled oscillator) frequency band switching circuit applied to double-loop clock data recovery circuit and loop switching method thereof
US11133891B2 (en) * 2018-06-29 2021-09-28 Khalifa University of Science and Technology Systems and methods for self-synchronized communications
CN112688701B (en) * 2020-12-22 2022-05-31 北京奕斯伟计算技术有限公司 Receiver circuit and receiver circuit control method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3959601A (en) * 1975-06-27 1976-05-25 Ford Motor Company Variable rate clock signal recovery circuit
US4849998A (en) * 1988-06-03 1989-07-18 Communications Satellite Corporation Rate synchronized symbol timing recovery for variable rate data transmission systems
US5550864A (en) * 1993-12-01 1996-08-27 Broadband Communications Products Bit rate-insensitive mechanism for transmitting integrated clock and data signals over digital communication link
US5671258A (en) * 1994-12-20 1997-09-23 3Com Corporation Clock recovery circuit and receiver using same
US5696800A (en) * 1995-03-22 1997-12-09 Intel Corporation Dual tracking differential manchester decoder and clock recovery circuit

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3908115A (en) * 1974-10-07 1975-09-23 Weston Instruments Inc Adaptively tuned data receiver
JPS594900B2 (en) 1979-09-03 1984-02-01 日本電気株式会社 clock recovery circuit
US4365210A (en) 1980-06-26 1982-12-21 Motorola, Inc. Data and clock recovery system having a phase-locked-loop and which controls dynamic loop response of a data stream of unknown data format
US4590602A (en) 1983-08-18 1986-05-20 General Signal Wide range clock recovery circuit
US4667333A (en) 1983-12-22 1987-05-19 Motorola, Inc. Automatic clock recovery circuit
CA1207845A (en) 1984-07-23 1986-07-15 Leslie M. Koskinen Adaptively tuned clock recovery circuit
US4707841A (en) 1984-08-21 1987-11-17 University Of Toronto, Innovations Foundation Digital data receiver for preamble free data transmission
US4726904A (en) 1984-12-17 1988-02-23 Senetek P L C Apparatus and method for the analysis and separation of macroions
US5208659A (en) 1986-06-03 1993-05-04 Scientific Atlanta, Inc. Method and apparatus for independently transmitting and recapturing clock recovery burst and DC restoration signals in a MAC system
JPH0620197B2 (en) 1987-09-09 1994-03-16 日本電気株式会社 Variable speed clock recovery circuit
GB2223136B (en) 1988-03-28 1992-10-14 Plessey Co Plc Broad band vco control system for clock recovery
US5438621A (en) 1988-11-02 1995-08-01 Hewlett-Packard Company DC-free line code and bit and frame synchronization for arbitrary data transmission
US4926447A (en) 1988-11-18 1990-05-15 Hewlett-Packard Company Phase locked loop for clock extraction in gigabit rate data communication links
US5204882A (en) 1990-12-14 1993-04-20 Bell Communications Research, Inc. Service clock recovery for variable bit rate services
US5325405A (en) 1991-08-27 1994-06-28 Motorola, Inc. Burst mode receiver control
US5175512A (en) 1992-02-28 1992-12-29 Avasem Corporation High speed, power supply independent CMOS voltage controlled ring oscillator with level shifting circuit
US5300898A (en) 1992-07-29 1994-04-05 Ncr Corporation High speed current/voltage controlled ring oscillator circuit
JPH06194123A (en) * 1992-12-24 1994-07-15 Canon Inc Displacement detecting device
SG49146A1 (en) 1993-01-22 1998-05-18 Oki Electric Ind Co Ltd Instantaneous phase sensitive detector and generator for clock reproducing signal installed in delay detector
JP3349778B2 (en) * 1993-07-16 2002-11-25 松下電器産業株式会社 Rate determination method and device in variable rate communication
KR960002463B1 (en) 1993-12-11 1996-02-17 한국전기통신공사 Digital data retiming device in high-speed data transmission
US5566204A (en) 1994-05-02 1996-10-15 Raytheon Company Fast acquisition clock recovery system
US5689530A (en) 1994-06-22 1997-11-18 Alcatel Network Systems, Inc. Data recovery circuit with large retime margin
US5642386A (en) 1994-06-30 1997-06-24 Massachusetts Institute Of Technology Data sampling circuit for a burst mode communication system
US5483372A (en) * 1994-11-29 1996-01-09 International Business Machines Corporation Single and multichannel transmission over long distances using repeated level-crossing remodulation
US5606317A (en) 1994-12-09 1997-02-25 Lucent Technologies Inc. Bandwidth efficiency MBNB coding and decoding method and apparatus
US5576647A (en) 1995-06-22 1996-11-19 Marvell Technology Group, Ltd. Charge pump for phase lock loop
US5596302A (en) 1996-01-17 1997-01-21 Lucent Technologies Inc. Ring oscillator using even numbers of differential stages with current mirrors

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3959601A (en) * 1975-06-27 1976-05-25 Ford Motor Company Variable rate clock signal recovery circuit
US4849998A (en) * 1988-06-03 1989-07-18 Communications Satellite Corporation Rate synchronized symbol timing recovery for variable rate data transmission systems
US5550864A (en) * 1993-12-01 1996-08-27 Broadband Communications Products Bit rate-insensitive mechanism for transmitting integrated clock and data signals over digital communication link
US5671258A (en) * 1994-12-20 1997-09-23 3Com Corporation Clock recovery circuit and receiver using same
US5696800A (en) * 1995-03-22 1997-12-09 Intel Corporation Dual tracking differential manchester decoder and clock recovery circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP1389382A4 *

Also Published As

Publication number Publication date
CN1134948C (en) 2004-01-14
EP1389382A4 (en) 2004-02-18
JP3615148B2 (en) 2005-01-26
EP1389382A2 (en) 2004-02-18
DE69832214T2 (en) 2006-07-27
KR100385005B1 (en) 2003-05-22
AU1618099A (en) 1999-06-28
ID26836A (en) 2001-02-15
CN1290443A (en) 2001-04-04
JP2003526225A (en) 2003-09-02
AU744341B2 (en) 2002-02-21
CA2312491A1 (en) 1999-06-17
CA2312491C (en) 2004-01-06
DE69832214D1 (en) 2005-12-08
KR20010032766A (en) 2001-04-25
TW494662B (en) 2002-07-11
WO1999030457A2 (en) 1999-06-17
US6285722B1 (en) 2001-09-04
EP1389382B1 (en) 2005-11-02

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