WO1999030503A9 - Method and apparatus for encoding and slicing digital video bit streams - Google Patents
Method and apparatus for encoding and slicing digital video bit streamsInfo
- Publication number
- WO1999030503A9 WO1999030503A9 PCT/IB1998/001922 IB9801922W WO9930503A9 WO 1999030503 A9 WO1999030503 A9 WO 1999030503A9 IB 9801922 W IB9801922 W IB 9801922W WO 9930503 A9 WO9930503 A9 WO 9930503A9
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- point
- seamless
- digital video
- bit stream
- video bit
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T9/00—Image coding
- G06T9/007—Transform coding, e.g. discrete cosine transform
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/20—Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
- H04N21/23—Processing of content or additional data; Elementary server operations; Server middleware
- H04N21/234—Processing of video elementary streams, e.g. splicing of video streams, manipulating MPEG-4 scene graphs
- H04N21/23406—Processing of video elementary streams, e.g. splicing of video streams, manipulating MPEG-4 scene graphs involving management of server-side video buffer
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/20—Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
- H04N21/23—Processing of content or additional data; Elementary server operations; Server middleware
- H04N21/234—Processing of video elementary streams, e.g. splicing of video streams, manipulating MPEG-4 scene graphs
- H04N21/23424—Processing of video elementary streams, e.g. splicing of video streams, manipulating MPEG-4 scene graphs involving splicing one content stream with another content stream, e.g. for inserting or substituting an advertisement
Definitions
- the present invention relates generally to the encoding of digital video signals, and morre particularly, to a novel approach to the construction of seamless splice points which minimizes the constraints on the upper and lower bounds of the bit rate which can be used for encoding a digital video bit stream (such as an MPEG-2 compliant video bit stream), to thereby significantly improve the picture quality relative to the presently known technology.
- Switching of compressed video streams i.e., "digital video bit streams”
- digital video bit streams is expected to be an important operation for future digital television production and distribution services.
- switching of digital video bit streams presents technical challenges that do not exist in current analog-based TV systems.
- One way of dealing with these challenges is to decompress the desired streams, perform the switching operation in baseband, and then re-compress the resulting switched signal.
- a Seamless Splice Point is a location in a bitstream that provides an opportunity to splice.
- a switching device When switching is desired, a switching device can switch from one SSP of one stream to another SSP of another stream without causing any decoder buffer underflow or overflow in an MPEG-2 compliant receiver. It is important to note that switching from an arbitrary point (i.e. not an SSP) in an MPEG-2 compliant stream to another arbitrary point of an MPEG-2 compliant stream can (and most likely will) cause an underflow or an overflow event at the decoder buffer. Thus, such "arbitrary point switching" is not “seamless”. In MPEG-2, the presence of a splice point is indicated (the spice point is "constructed") by a splice flag field and splice_countdown fields in the bitstream.
- splice_decoding_delay SDD
- MSR maximum_splice_rate
- the SMPTE committee defines two types of splice points: In Point (IP) and Out Point (OP).
- IP In Point
- OP Out Point
- IP In Point
- An In Point is "a point in a PID stream where a splicing device may enter”.
- a PID stream can be a video stream, audio stream, etc.
- an Out Point is defined as "a point in a PID stream where a splicing device may exit”.
- every seamless video In Point must meet all the constraints of a seamless video Out Point (the terms seamless video In Point and seamless video Out Point will hereinafter be referred to simply as “seamless In Point” and “seamless Out Point”).
- a seamless In Point must have additional constraints.
- the main (video related) constraint is that the first picture after a seamless In Point must be an Intra-coded (I) picture. Therefore, based on the SMPTE committee teachings, all of the SDD and MSR related constraints (outlined above) must be adhered to when constructing both seamless In Points and seamless Out Points.
- FIG. 1 graphically depicts these constraints in accordance with the teachings of Applicant's co-pending U.S. Patent Application Serial Number 08/829,124.
- t sp - ⁇ is the time when the encoder bounds start changing, and where ⁇ is the end-to- end delay (i.e. encoder buffer plus decoder buffer delays), t e is the time of encoding the "First- picture", t sp is the time when the first byte of the "First-Picture" enters the decoder buffer, and t Sp +SDD is the time of decoding the "First-Picture”.
- the Figure illustrates an example of the lower encoder buffer bound 1 and upper encoder buffer bound 2 that must be adhered to when constructing a seamless In Point or seamless Out Point, when the normal bit rate (r n ) of the stream where seamless splice points must be inserted is smaller than MSR (block 10) or greater than MSR (block 11).
- the Figure also shows the "normal" lower (3) and upper (4) encoder bounds, i.e., the encoder bounds that must normally be adhered to by the encoder when there is no need to construct an SSP, As illustrated in this example, the encoder must adhere to stringent buffer constraints when constructing an SSP.
- one objective of the present invention is to enable encoders to construct seamless In and Out Points while assuming and using their normal bitrates.
- the notion "normal bitrate” means the bitrate the encoder would "normally” use without worrying about the operation of inserting splice points.
- the present invention encompasses, in one of its aspects, a method of encoding a digital video bit stream which includes a plurality of successively-encoded pictures which includes the steps of constructing a seamless In Point in accordance with a constraint expressed by the following equation (1): (1) ddf_ ⁇ p ⁇ minimum ⁇ DD tnrjp , (B d /r n _, P ) ⁇ , where dd f _, p represents an amount of time by which a first byte of the digital video bit stream after the seamless In Point must stay in a decoder buffer before it is decoded; B d is a size of the decoder buffer; r n ⁇ p is a bit rate at which the digital video bit stream is normally encoded at the seamless In Point; and, DD t h r ⁇ p
- the decoder can derive the decoding delays dd f _ ⁇ p and dd f _ op , for example, from the vbv_delay field, the PCR field (program clock reference), or the DTS field (display time stamp) of the MPEG bitstream.
- the present invention encompasses, in another of its aspects, a method for splicing a first digital video bit stream at an Out Point into a second digital video bit stream at an In Point, which includes the steps of measuring dd f _ op , measuring dd f _ ⁇ p , computing a difference W equal to dd f _ op - dd f _ ⁇ p , switching from the Out Point, and, after switching from the Out Point, waiting an amount of time equal to W, and then switching into the In Point.
- the present invention encompasses a video signal which includes a digital video bit stream encoded in accordance with any one or more of the encoding methods of the present invention; a video signal which includes first and second digital video bit streams spliced together in accordance with any of the splicing methods of the present invention; and, an encoder for implementing any one of the encoding methods of the present invention.
- FIG. 1 is combination flow chart and graphical depiction of a method used by an encoder in constructing a seamless splice (In or Out) point, in accordance with the teachings of co-pending U.S. Application Serial No. 08/829,124;
- FIG. 2 is a combination flow chart and graphical depiction of a method used by an encoder in constructing a seamless splice points, in accordance with the teachings of co-pending U.S. Application titled Video Buffer for Seamless Splicing of MPEG Streams filed November 25, 1997
- FIG. 3 is a combination flow chart and graphical depiction of a method used by an encoder in constructing a seamless splice points, in accordance with the preferred embodiment of the present invention.
- FIG. 3 A flow chart of the methodology of constructing seamless In and Out Points in accordance with the present invention is depicted in FIG. 3, as well as graphs which illustrate exemplary uses of the present invention.
- Like reference numerals in this Figure denote like blocks in FIGS. 1 and 2.
- an encoder can assume its normal bit rate r n op when constructing a seamless Out Point, by selecting a value for the decoding delay ddf_ op (which is larger than SDD) such that dd f _ op meets the constraint expressed by the following equation (1): (1 ) DD,hr_op ⁇ ddf op ⁇ (B d / r ⁇ op ), where B d is the decoder buffer size, and DD t h r _ op is a decoding delay threshold for a seamless Out Point which has a value defined by the following equation (2): (2) DD. hr.
- T p o ((MSR/rpaper_ utilizatp) * SDD ) T p o * ((MSR/r n _ op ) - 1 ), where T p o is the time needed for displaying the picture which starts displaying at the time of decoding of the last picture prior to the seamless Out Point.
- an encoder can construct a seamless Out Point when the normal encoder bit rate r n o is smaller than MSR, by selecting a value for the decoding delay dd f _ op which meets the constraints specified in equations (1) and (2) above. This enables the encoder to assume its normal bit rate r n op and not the higher bit rate MSR, thereby significantly improving the quality of pictures constructed around a seamless Out Point.
- an encoder can construct a seamless Out Point when the normal rate r n op is smaller than MSR, by selecting the particular value for the decoding delay ddf_ op defined by equation (3) .
- This enables the encoder to assume its normal bit rate r n op and not the higher bit rate MSR, thereby significantly improving the quality of pictures constructed around a seamless Out Point.
- the step of selecting dd f _ op defined by equation (3) is denoted 16 in FIG. 3.
- the corresponding buffer boundary constraints are shown by the block 17.
- the encoder has the option for the decoder delay ddf_ op to select a value > SDD (denoted 26).
- the corresponding buffer boundary constraints are shown by the block 27.
- equation (3) always satisfies the constraints expressed by equations (1) and (2), and further, since MSR and SDD are always selected such that (MSR*SDD ⁇ B d ), then defining a particular value for dd f _ op by using equation (3) provides the following enumerated benefits:
- an encoder can construct a seamless In Point when the normal encoder bit rate r n _, p is larger than MSR, by selecting a value for the decoding delay ddf_ ⁇ p which satisfies the constraints expressed in equations (4) and (5). This enables the encoder to use its normal bit rate r njp and not the lower bit rate MSR, thereby significantly improving the quality of pictures constructed around a seamless In Point.
- an encoder can construct a seamless In Point when the normal encoder bit rate r n ⁇ p is larger than MSR, by selecting the particular value for the decoding delay dd f _ ⁇ p defined by equation (6). This enables the encoder to use its normal bit rate r n _, p and not the smaller bit rate MSR, thereby significantly improving the quality of pictures constructed around a seamless In Point.
- the step of selecting ddf_, p defined by equation (6) is denoted 18 in FIG. 3.
- the corresponding buffer boundary constraints are shown by the block 19. If MSR is greater than r n _ ⁇ , the encoder has the option for the decoder delay dd f _ ⁇ p to select a value ⁇ SDD (denoted 28).
- the corresponding buffer boundary constraints are shown by the block 29.
- equation (6) Since equation (6) always satisfies the constraints expressed by equations (4) and (5), and further, since MSR and SDD are always selected such that (MSR*SDD ⁇ B d ), then equation (6) provides the following enumerated benefits: 1) It ensures the construction of a seamless In Point without the need to evaluate the relationship among the quantities of B d , r n ⁇ p , MSR, and SDD. 2) It eliminates the need for knowing the value of T p _, when evaluating the decoding delay threshold DD thr _, p as expressed in equation (5). This could be useful for video sequences that have variable picture-display times.
- a splicer operating on digital video bit streams that include Seamless Splice Points (SSP,) constructed in accordance with the present invention can use the following procedures to achieve seamless splicing (i.e., without causing the decoder buffer underflow or overflow): 1) The decoding delay (ddf_ op ) of the seamless Out Point is measured.
- the splicer can use any one of the following procedures a, b, or c (the desired procedure could be selected by the user or automatically under software control): a) Wait an amount of time equal to W before switching into the seamless In Point. For example, the splicer can send NULL packets for the duration of W. b) Use the following steps: i.) Stream the In Point stream (e.g., first digital video bit stream)at a rate (Rw) less than or equal to the Out Point rate (i.e.
- the splicing technique of the present invention can be used to splice between non-seamless In and Out Points, or between a non-SSP and an SSP (or SSPj), although, in these cases, it should be recognized that the splice will not be seamless unless the following constraints are satisfied: dd f _ op ddf ip , and r n _ op > r n _i P .
- the size of the buffer (B sp ) needed in the splicer to implement the present invention can be computed from the maximum value W ma ⁇ that the duration W can have, in accordance with the following equation (11): where R max is the maximum bit rate the splicer can receive. If equations (3) and (6) are used to construct seamless In and Out
- Equation (12) MSR * SDD * ((l / r min _ op ) - (l / r maxJp )) ⁇ B d * ((l / r ⁇ nin _ op ) - (l / r maxJp )).
- W max can be expressed by the following equation (13):
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53046299A JP4242459B2 (en) | 1997-12-09 | 1998-12-03 | Method and apparatus for encoding and slicing a digital video bitstream |
DE69836416T DE69836416T2 (en) | 1997-12-09 | 1998-12-03 | DEVICE AND METHOD FOR CODING AND DISCONNECTING DIGITAL VIDEO DATA STREAMS |
EP98954691A EP0958703B1 (en) | 1997-12-09 | 1998-12-03 | Method and apparatus for encoding and slicing digital video bit streams |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/987,701 US6049569A (en) | 1997-12-09 | 1997-12-09 | Method and apparatus for encoding digital video bit streams with seamless splice points and method and apparatus for splicing such digital video bit streams |
US08/987,701 | 1997-12-09 |
Publications (3)
Publication Number | Publication Date |
---|---|
WO1999030503A2 WO1999030503A2 (en) | 1999-06-17 |
WO1999030503A3 WO1999030503A3 (en) | 1999-07-22 |
WO1999030503A9 true WO1999030503A9 (en) | 2005-03-17 |
Family
ID=25533489
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB1998/001922 WO1999030503A2 (en) | 1997-12-09 | 1998-12-03 | Method and apparatus for encoding and slicing digital video bit streams |
Country Status (5)
Country | Link |
---|---|
US (1) | US6049569A (en) |
EP (1) | EP0958703B1 (en) |
JP (1) | JP4242459B2 (en) |
DE (1) | DE69836416T2 (en) |
WO (1) | WO1999030503A2 (en) |
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US5982436A (en) * | 1997-03-28 | 1999-11-09 | Philips Electronics North America Corp. | Method for seamless splicing in a video encoder |
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US5982436A (en) * | 1997-03-28 | 1999-11-09 | Philips Electronics North America Corp. | Method for seamless splicing in a video encoder |
-
1997
- 1997-12-09 US US08/987,701 patent/US6049569A/en not_active Expired - Fee Related
-
1998
- 1998-12-03 DE DE69836416T patent/DE69836416T2/en not_active Expired - Lifetime
- 1998-12-03 JP JP53046299A patent/JP4242459B2/en not_active Expired - Fee Related
- 1998-12-03 WO PCT/IB1998/001922 patent/WO1999030503A2/en active IP Right Grant
- 1998-12-03 EP EP98954691A patent/EP0958703B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
WO1999030503A3 (en) | 1999-07-22 |
EP0958703A2 (en) | 1999-11-24 |
JP4242459B2 (en) | 2009-03-25 |
DE69836416D1 (en) | 2006-12-28 |
WO1999030503A2 (en) | 1999-06-17 |
JP2001511335A (en) | 2001-08-07 |
DE69836416T2 (en) | 2007-09-20 |
EP0958703B1 (en) | 2006-11-15 |
US6049569A (en) | 2000-04-11 |
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