WO1999056428A1 - Apparatus and method of reading a program into a processor - Google Patents

Apparatus and method of reading a program into a processor Download PDF

Info

Publication number
WO1999056428A1
WO1999056428A1 PCT/US1999/005322 US9905322W WO9956428A1 WO 1999056428 A1 WO1999056428 A1 WO 1999056428A1 US 9905322 W US9905322 W US 9905322W WO 9956428 A1 WO9956428 A1 WO 9956428A1
Authority
WO
WIPO (PCT)
Prior art keywords
program
processor
decrypted
executing
encrypted
Prior art date
Application number
PCT/US1999/005322
Other languages
French (fr)
Inventor
Michael W. Bright
Kenneth Carl Fuchs
Kelly Jo Marquardt
Original Assignee
Motorola Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc. filed Critical Motorola Inc.
Priority to JP55412899A priority Critical patent/JP2002507307A/en
Priority to EP99913850A priority patent/EP0990326A4/en
Priority to BR9906398-0A priority patent/BR9906398A/en
Priority to CA002292667A priority patent/CA2292667C/en
Priority to IL13324799A priority patent/IL133247A0/en
Priority to AU31834/99A priority patent/AU3183499A/en
Publication of WO1999056428A1 publication Critical patent/WO1999056428A1/en
Priority to HK01100256A priority patent/HK1029470A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60—Protecting data
    • G06F21/62—Protecting access to data via a platform, e.g. using keys or access control rules
    • G06F21/6209—Protecting access to data via a platform, e.g. using keys or access control rules to a single file or object, e.g. in a secure envelope, encrypted and accessed using a key, or with access control rules appended to the object itself
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/57—Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
    • G06F21/572—Secure firmware programming, e.g. of basic input output system [BIOS]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/57—Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
    • G06F21/575—Secure boot
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2211/00—Indexing scheme relating to details of data-processing equipment not covered by groups G06F3/00 - G06F13/00
    • G06F2211/007—Encryption, En-/decode, En-/decipher, En-/decypher, Scramble, (De-)compress
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2211/00—Indexing scheme relating to details of data-processing equipment not covered by groups G06F3/00 - G06F13/00
    • G06F2211/1097—Boot, Start, Initialise, Power
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/2147—Locking files

Definitions

  • This invention relates to processors, including but not limited to adding security to the bootstrap mode of processors.
  • processors such as microprocessors, digital signal processors, programmable logic arrays (PLAs), field programmable gate arrays (FPGAs) micro controllers, and microcomputers, are well known.
  • Such devices may include on-board RAM (Random Access Memory), ROM (Read Only Memory), EPROM, timers, I/O ports, and serial ports.
  • Boot mode also known programming, emulation (debug), or test mode
  • a bootstrap mode also known programming, emulation (debug), or test mode
  • emulation or other data
  • Devices such as PLAs and other reconfigurable hardware devices also have a bootstrap mode that serves to provide internal hardware configurations from an external device that contains instructions or blueprints for configuration of the device.
  • FIG. 1 is a block diagram of a processor in accordance with the invention.
  • FIG. 2 is a flowchart showing a method of adding authenticity to and/or encrypting a bootstrap program in accordance with the invention.
  • FIG. 3 is a flowchart showing a method of decrypting and/or authenticating a bootstrap program in accordance with the invention.
  • the following describes an apparatus for and method of providing a secure method of downloading a program into a processor from a memory device external to the processor, particularly useful in bootstrap mode.
  • the program may be encrypted prior to its entry into the external device.
  • the program may also have authentication information added to it. Authentication information may be provided on an unencrypted and/or an encrypted program.
  • the processor decrypts and/or authenticates the program before allowing the program to be executed by the processor.
  • a method of the present invention comprises the steps of entering a bootstrap mode of a processor; reading, into a memory within the processor, a program from an external device; decrypting the program using a key embedded inside the processor, yielding a decrypted program; and executing the decrypted program.
  • the method may further comprise the steps of determining if the program was properly encrypted and when the program was not properly encrypted, inhibiting execution of the program by the processor.
  • the method may further comprise the steps of performing authentication verification on the decrypted program; when the decrypted program is authenticated, executing the decrypted program; and when the decrypted program fails to be authenticated, inhibiting execution of the program by the processor.
  • a method of the present invention comprises the steps of entering a bootstrap mode of a processor; reading, by a first memory within the processor, a program from an external device; performing authentication verification on the program; when the program is authenticated, executing the decrypted program; and when the decrypted program fails to be authenticated, inhibiting execution of the program by the processor.
  • the step of inhibiting execution of the program by the processor may comprise the step of stopping the processor from executing any code until a restart of the processor, the step of entering the processor into an infinite loop, or the step of starting the process again, beginning with the entering step.
  • the failure to authenticate may be indicated with an error message.
  • the method may comprise the step of preventing the executing step from occurring without successfully completing the authenticating step.
  • the step of performing authentication verification may comprise the step of performing a checksum on the decrypted program, the step of performing a hash on the decrypted program, the step of performing an encrypted checksum on the decrypted program, or the step of checking a digital signature of the decrypted program.
  • the key embedded inside the processor may be a public decryption key, a private decryption key, or a symmetric decryption key.
  • the key embedded inside the processor may be processed into another key that is used to decrypt the program.
  • a process in accord with the present invention comprises a first memory device (ROM), arranged and constructed to obtain a program from a device external to the processor during a bootstrap mode; a decryption processor, operably coupled to the first memory device, arranged and constructed to decrypt the program utilizing a key stored within the processor; and a second memory device (RAM) arranged and constructed to store the decrypted program.
  • the processor may also be arranged and constructed to execute the decrypted program only after successful authentication of the decrypted program.
  • FIG. 1 A block diagram of a processor coupled to an external programming device is shown in FIG. 1.
  • a processor 101 such as a custom integrated circuit based on an ARM processor architecture that is available from ARM, LTD., is connected to an external device 103, such as a ROM, EPROM, EEPROM, RAM, or another processor, such as a personal computer or test fixture.
  • the processor 101 contains a bootstrap processing section 105 that performs bootstrap processing when the processor 101 is entered into bootstrap mode.
  • the bootstrap processing section 105 accesses the external device 103 and downloads its program into RAM 109.
  • the information downloaded from the external device may be decrypted, in which the decryption processing 107 accesses a key 113 in order to decrypt the information.
  • the bootstrap processing section 105 may also authenticate the program downloaded from the external device 103, as shown and described for FIG. 3 below.
  • the bootstrap processing section 105 is part of the internal ROM of the processor 101 and is separate from the ROM 111 that provides other functions for the processor 101.
  • the present invention provides three different levels of security.
  • the program stored in the external device 103 is encrypted, preferably in such a way that only the processor 101 can decrypt the program before the program may be executed.
  • the program stored in the external device 103 has added authenticity information, such as a checksum, hash, and so forth, which authenticity information must be authenticated by the processor 101 before the program may be executed.
  • the program stored in the external device is both encrypted and has added authenticity information, and the program must be both decrypted and successfully authenticated before the program may be executed.
  • Each of the three different levels of security may be made further secure by using two or more encryption processes and/or two or more authentication procedures, or using a more secure encryption method and/or a more demanding authentication process.
  • step 201 A flowchart of a method of processing a program for storage in an external device 103 for later entry to a processor 101 is shown in FIG. 2.
  • step 203 authentication information is added to the program as necessary.
  • the addition of authentication information may include performing a checksum or an encrypted checksum, also known as a message authentication code, on the unencrypted program.
  • a digital signature of the unencrypted program may also be used to provide authentication.
  • step 205 it is determined if the processor 101 requires an encrypted program from the external device 103. If encryption is to take place, the program is encrypted at step 205. Encryption methods include digital scrambling of data, public key encryption, private key encryption, symmetric key encryption, and so forth.
  • step 209 it is determined if authenticity should be added at this point in the process. If it is, the process continues to step 211, where such authenticity is added, otherwise the process ends.
  • Authentication information added after encryption at step 211 may include a hash, which is a one way checksum performed on an encrypted program, and/or an encrypted checksum (message authentication code) performed on the encrypted program. A digital signature of the encrypted program may also be used to provide authentication. Adding authentication may take place before (step 203) and after encryptiori step 209), when the program is to be encrypted.
  • FIG. 3 A flowchart of a method of decrypting and/or authenticating a bootstrap program is shown in FIG. 3.
  • the steps of the method of FIG. 3 are performed by the bootstrap processing section 105 of the processor 101, except for steps 307 and 317.
  • the processor's 101 bootstrap mode is entered.
  • a program is read from the external device 103.
  • step 305 it may be determined if the program was properly encrypted. Properly encrypted data is data that has not been altered or erroneously decrypted encrypted. When the program was not properly encrypted, the process would continue with step 315 (via the dashed line), where execution of the program by the processor is inhibited.
  • the decryption step is performed by the decryption processing section 107 of the processor 101.
  • the decryption process is tailored to the type of encryption that was used to encrypt the program in the external device 103. If, for example, asymmetric encryption key was used to encrypt the program in the external device 103, then the same key would be used to decrypt the program at step 307.
  • a public encryption key system was utilized, the program was encrypted by a public key and placed in the external device 103, and the processor 101 uses a private key to decrypt the same message.
  • the key 113 used for decryption is embedded inside the processor in the preferred embodiment.
  • the key 113 may be stored in RAM, ROM, programmable non-volatile memory, fixed hardware, and so forth.
  • the decryption step may also include processing a key into another key or another piece of information to be used to decrypt the program.
  • step 309 it is determined if the program to be downloaded from the external device 103 is to be authenticated.
  • externally encrypting the program to be bootstrapped into the processor 101 provides security, in part because an undesired party would not easily be able to decrypt the program in the external device 103, additional security is possible either for encrypted or unencrypted programs by performing authentication verification on the program.
  • Such authentication would, among other benefits, prevent an external program from running internal to the processor 101 and potentially causing sensitive information within the processor 101 to be output by the processor 101, thereby compromising the information within the processor 101.
  • the authentication process may also prevent undesired programs from running, which undesired programs might cause desired programs to malfunction, create undesirable processing patterns or pathways, take processing power from desirable processor functions, and so forth.
  • Internal code and hardware (functions) may be kept away from unauthorized access or use, and further unauthorized reading in and unauthorized reading out of the data may also be prevented, while providing for authorized reading in and authorized reading out without limitation.
  • the program which may be a decrypted program, is authenticated. If, for example, a checksum or hash was used to authenticate the program, then a checksum or hash should be performed on the (decrypted) program at step 311. If at step 313, the program is not successfully authenticated, execution of the program is inhibited at step 315, and the process ends. Inhibiting of the execution of the program may include stopping the processor 101 from executing any downloaded code until the processor 101 is restarted, including flushing the (decrypted) program that was downloaded into the processor 101 from the external device 103.
  • the processor 101 may be designed and/or programmed in such a way as to prevent the processor 101 from executing the program without successfully completing the authenticating process, i.e., no back around the authentication door (method to defeat the authentication) is provided.
  • the deactivating may also include placing the processor in an infinite loop or starting the process again beginning with step 301 (via the dashed line).
  • the failure to authenticate may be indicated with an error message external to the processor, such that a display may indicate to a user that the bootstrap download failed. If at step 313, the (decrypted) program is authenticated, the authenticated (decrypted) program is executed at step 317, and the process ends.
  • the present invention provides a method for keeping external codes secure and protected from reverse engineering. Alternate embodiments of the invention provide up to three different levels of security.
  • invention provides a way to prevent unwanted code from being executed in a processor, which unwanted code might divulge secret or sensitive information stored within the processor. Internal code and hardware are protected from unauthorized access or use. Additional authorized reading in and further authorized reading out of the downloaded, potentially encrypted and authenticated program, is also provided.

Abstract

The following describes an apparatus for and method of providing a secure method of downloading a program into a processor (101) from a device (103) external to the processor (101). The program may be encrypted (207) prior to its entry into the external device (103). The program may also have authentication information added (203 and 207) to it. Authentication information may be provided on an unencrypted and/or an encrypted program. The processor (101) decrypts (307) and/or successfully authenticates (311) the program before allowing the program to be executed by the processor (101).

Description

APPARATUS AND METHOD OF READING A PROGRAM INTO A
PROCESSOR
Field of the Invention
This invention relates to processors, including but not limited to adding security to the bootstrap mode of processors.
Background of the Invention
Processors, such as microprocessors, digital signal processors, programmable logic arrays (PLAs), field programmable gate arrays (FPGAs) micro controllers, and microcomputers, are well known. Such devices may include on-board RAM (Random Access Memory), ROM (Read Only Memory), EPROM, timers, I/O ports, and serial ports.
Processors often have a bootstrap mode, also known programming, emulation (debug), or test mode, which entails downloading a bootstrap program (or other data) from an external source, which program is executed by the processor to provide a desired function, which functions are numerous. Devices such as PLAs and other reconfigurable hardware devices also have a bootstrap mode that serves to provide internal hardware configurations from an external device that contains instructions or blueprints for configuration of the device.
Because the program being downloaded in bootstrap mode comes from a source external to the processor, there are potential security risks associated with downloading an external program. Today, security for microprocessors is designed to prevent further reading in and reading out of data using fuses or fusible links that are severed once the program is entered into the microprocessor. Such technology may be found in the PIC™ chip available from Microchip, Inc. Such a solution, however, does not prevent tampering with the external source of information nor does it prevent undesirable programs from entering the processor, and further prevents the device from being programmed at a later time by an authorized programmer, thereby limiting the flexibility of the device.
Accordingly, there is a need for a processor that has a more secure method of downloading a bootstrap program that allows for multiple bootstrap programming of a single device.
Brief Description of the Drawings
FIG. 1 is a block diagram of a processor in accordance with the invention.
FIG. 2 is a flowchart showing a method of adding authenticity to and/or encrypting a bootstrap program in accordance with the invention.
FIG. 3 is a flowchart showing a method of decrypting and/or authenticating a bootstrap program in accordance with the invention.
Description of a Preferred Embodiment
The following describes an apparatus for and method of providing a secure method of downloading a program into a processor from a memory device external to the processor, particularly useful in bootstrap mode. The program may be encrypted prior to its entry into the external device. The program may also have authentication information added to it. Authentication information may be provided on an unencrypted and/or an encrypted program. The processor decrypts and/or authenticates the program before allowing the program to be executed by the processor.
A method of the present invention comprises the steps of entering a bootstrap mode of a processor; reading, into a memory within the processor, a program from an external device; decrypting the program using a key embedded inside the processor, yielding a decrypted program; and executing the decrypted program. The method may further comprise the steps of determining if the program was properly encrypted and when the program was not properly encrypted, inhibiting execution of the program by the processor. The method may further comprise the steps of performing authentication verification on the decrypted program; when the decrypted program is authenticated, executing the decrypted program; and when the decrypted program fails to be authenticated, inhibiting execution of the program by the processor.
A method of the present invention comprises the steps of entering a bootstrap mode of a processor; reading, by a first memory within the processor, a program from an external device; performing authentication verification on the program; when the program is authenticated, executing the decrypted program; and when the decrypted program fails to be authenticated, inhibiting execution of the program by the processor.
The step of inhibiting execution of the program by the processor may comprise the step of stopping the processor from executing any code until a restart of the processor, the step of entering the processor into an infinite loop, or the step of starting the process again, beginning with the entering step. The failure to authenticate may be indicated with an error message. In addition, the method may comprise the step of preventing the executing step from occurring without successfully completing the authenticating step. The step of performing authentication verification may comprise the step of performing a checksum on the decrypted program, the step of performing a hash on the decrypted program, the step of performing an encrypted checksum on the decrypted program, or the step of checking a digital signature of the decrypted program. The key embedded inside the processor may be a public decryption key, a private decryption key, or a symmetric decryption key. The key embedded inside the processor may be processed into another key that is used to decrypt the program.
A process in accord with the present invention comprises a first memory device (ROM), arranged and constructed to obtain a program from a device external to the processor during a bootstrap mode; a decryption processor, operably coupled to the first memory device, arranged and constructed to decrypt the program utilizing a key stored within the processor; and a second memory device (RAM) arranged and constructed to store the decrypted program. The processor may also be arranged and constructed to execute the decrypted program only after successful authentication of the decrypted program.
A block diagram of a processor coupled to an external programming device is shown in FIG. 1. A processor 101, such as a custom integrated circuit based on an ARM processor architecture that is available from ARM, LTD., is connected to an external device 103, such as a ROM, EPROM, EEPROM, RAM, or another processor, such as a personal computer or test fixture. The processor 101 contains a bootstrap processing section 105 that performs bootstrap processing when the processor 101 is entered into bootstrap mode. The bootstrap processing section 105 accesses the external device 103 and downloads its program into RAM 109. The information downloaded from the external device may be decrypted, in which the decryption processing 107 accesses a key 113 in order to decrypt the information. The bootstrap processing section 105 may also authenticate the program downloaded from the external device 103, as shown and described for FIG. 3 below. In the preferred embodiment, the bootstrap processing section 105 is part of the internal ROM of the processor 101 and is separate from the ROM 111 that provides other functions for the processor 101.
The present invention provides three different levels of security. In one level, the program stored in the external device 103 is encrypted, preferably in such a way that only the processor 101 can decrypt the program before the program may be executed. In a second level, the program stored in the external device 103 has added authenticity information, such as a checksum, hash, and so forth, which authenticity information must be authenticated by the processor 101 before the program may be executed. In a third level, the program stored in the external device is both encrypted and has added authenticity information, and the program must be both decrypted and successfully authenticated before the program may be executed. Each of the three different levels of security may be made further secure by using two or more encryption processes and/or two or more authentication procedures, or using a more secure encryption method and/or a more demanding authentication process.
A flowchart of a method of processing a program for storage in an external device 103 for later entry to a processor 101 is shown in FIG. 2. At step 201, if it is desired to add authenticity to the program to be downloaded, the process continues with step 203, where authentication information is added to the program as necessary. The addition of authentication information may include performing a checksum or an encrypted checksum, also known as a message authentication code, on the unencrypted program. A digital signature of the unencrypted program may also be used to provide authentication.
The process continues with step 205, where it is determined if the processor 101 requires an encrypted program from the external device 103. If encryption is to take place, the program is encrypted at step 205. Encryption methods include digital scrambling of data, public key encryption, private key encryption, symmetric key encryption, and so forth. After step 207, the process continues with step 209, where it is determined if authenticity should be added at this point in the process. If it is, the process continues to step 211, where such authenticity is added, otherwise the process ends. Authentication information added after encryption at step 211 may include a hash, which is a one way checksum performed on an encrypted program, and/or an encrypted checksum (message authentication code) performed on the encrypted program. A digital signature of the encrypted program may also be used to provide authentication. Adding authentication may take place before (step 203) and after encryptiori step 209), when the program is to be encrypted.
A flowchart of a method of decrypting and/or authenticating a bootstrap program is shown in FIG. 3. In the preferred embodiment, the steps of the method of FIG. 3 are performed by the bootstrap processing section 105 of the processor 101, except for steps 307 and 317. At step 301, the processor's 101 bootstrap mode is entered. At step 303, a program is read from the external device 103. At step 305, it is determined if the program read from the external device is encrypted. If the program is not encrypted, the process continues with step 309. Alternatively, if the program was not encrypted, the process may continue with step 315, where execution of the program is inhibited. Such an option would be chosen when it is desired to only have encrypted data downloaded into the processor, such as when secure information is only desired to be downloaded, or when it is desired to prevent altering of the external program before it is downloaded. Alternatively, at step 305, it may be determined if the program was properly encrypted. Properly encrypted data is data that has not been altered or erroneously decrypted encrypted. When the program was not properly encrypted, the process would continue with step 315 (via the dashed line), where execution of the program by the processor is inhibited.
If the program was found to be encrypted at step 305, the program is then decrypted at step 307. In the preferred embodiment, the decryption step is performed by the decryption processing section 107 of the processor 101. The decryption process is tailored to the type of encryption that was used to encrypt the program in the external device 103. If, for example, asymmetric encryption key was used to encrypt the program in the external device 103, then the same key would be used to decrypt the program at step 307. Similarly, if a public encryption key system was utilized, the program was encrypted by a public key and placed in the external device 103, and the processor 101 uses a private key to decrypt the same message. The key 113 used for decryption is embedded inside the processor in the preferred embodiment. The key 113 may be stored in RAM, ROM, programmable non-volatile memory, fixed hardware, and so forth. The decryption step may also include processing a key into another key or another piece of information to be used to decrypt the program.
At step 309, it is determined if the program to be downloaded from the external device 103 is to be authenticated. Although externally encrypting the program to be bootstrapped into the processor 101 provides security, in part because an undesired party would not easily be able to decrypt the program in the external device 103, additional security is possible either for encrypted or unencrypted programs by performing authentication verification on the program. Such authentication would, among other benefits, prevent an external program from running internal to the processor 101 and potentially causing sensitive information within the processor 101 to be output by the processor 101, thereby compromising the information within the processor 101. The authentication process may also prevent undesired programs from running, which undesired programs might cause desired programs to malfunction, create undesirable processing patterns or pathways, take processing power from desirable processor functions, and so forth. Internal code and hardware (functions) may be kept away from unauthorized access or use, and further unauthorized reading in and unauthorized reading out of the data may also be prevented, while providing for authorized reading in and authorized reading out without limitation.
At step 311, the program, which may be a decrypted program, is authenticated. If, for example, a checksum or hash was used to authenticate the program, then a checksum or hash should be performed on the (decrypted) program at step 311. If at step 313, the program is not successfully authenticated, execution of the program is inhibited at step 315, and the process ends. Inhibiting of the execution of the program may include stopping the processor 101 from executing any downloaded code until the processor 101 is restarted, including flushing the (decrypted) program that was downloaded into the processor 101 from the external device 103. Alternatively, the processor 101 may be designed and/or programmed in such a way as to prevent the processor 101 from executing the program without successfully completing the authenticating process, i.e., no back around the authentication door (method to defeat the authentication) is provided. The deactivating may also include placing the processor in an infinite loop or starting the process again beginning with step 301 (via the dashed line). In addition, the failure to authenticate may be indicated with an error message external to the processor, such that a display may indicate to a user that the bootstrap download failed. If at step 313, the (decrypted) program is authenticated, the authenticated (decrypted) program is executed at step 317, and the process ends.
The present invention provides a method for keeping external codes secure and protected from reverse engineering. Alternate embodiments of the invention provide up to three different levels of security. The present 8
invention provides a way to prevent unwanted code from being executed in a processor, which unwanted code might divulge secret or sensitive information stored within the processor. Internal code and hardware are protected from unauthorized access or use. Additional authorized reading in and further authorized reading out of the downloaded, potentially encrypted and authenticated program, is also provided.
The present invention may be embodied in other specific forms without departing from its spirit or essential characteristics. The described embodiments are to be considered in all respects only as illustrative and not restrictive. The scope of the invention is, therefore, indicated by the appended claims rather than by the foregoing description. All changes that come within the meaning and range of equivalency of the claims are to be embraced within their scope.
What is claimed is:

Claims

Claims
1. A method comprising the steps of:
entering a bootstrap mode of a processor;
reading, into a memory within the processor, a program from an external device;
decrypting the program using a key embedded inside the processor, yielding a decrypted program;
executing the decrypted program.
10
2. The method of claim 1, further comprising the steps of:
determining if the program was properly encrypted;
when the program was not properly encrypted, inhibiting execution of the program by the processor.
3. The method of claim 1, wherein the executing step comprises the steps of:
performing authentication verification on the decrypted program;
when the decrypted program is authenticated, executing the decrypted program;
when the decrypted program fails to be authenticated, inhibiting execution of the program by the processor.
4. The method of claim 3, wherein the step of inhibiting execution of the program by the processor comprises the step of stopping the processor from executing any code until a restart of the processor.
5. The method of claim 3, wherein the step of inhibiting execution of the program by the processor comprises the step of starting the process again, beginning with the entering step.
6. The method of claim 3, further comprising the step of preventing the executing step from occurring without successfully completing the authenticating step. 11
7. A processor comprising:
a first memory, arranged and constructed to obtain a program from a device external to the processor during a bootstrap mode;
a decryption processor, operably coupled to the first memory, arranged and constructed to decrypt the program utilizing a key stored within the processor;
a second memory arranged and constructed to store the decrypted program.
8. The processor of claim 7, wherein the processor is arranged and constructed to execute the decrypted program only after successful authentication of the decrypted program.
12
9. A method comprising the steps of:
entering a bootstrap mode of a processor;
reading, by a first memory within the processor, a program from an external device;
performing authentication verification on the program;
when the program is authenticated, executing the decrypted program;
when the decrypted program fails to be authenticated, inhibiting execution of the program by the processor.
10. The method of claim 9, further comprising the step of preventing the executing step from occurring without successfully completing the authenticating step.
PCT/US1999/005322 1998-04-27 1999-03-11 Apparatus and method of reading a program into a processor WO1999056428A1 (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP55412899A JP2002507307A (en) 1998-04-27 1999-03-11 Apparatus and method for loading a program into a processor
EP99913850A EP0990326A4 (en) 1998-04-27 1999-03-11 Apparatus and method of reading a program into a processor
BR9906398-0A BR9906398A (en) 1998-04-27 1999-03-11 Apparatus and method of reading a program inside a processor.
CA002292667A CA2292667C (en) 1998-04-27 1999-03-11 Apparatus and method of reading a program into a processor
IL13324799A IL133247A0 (en) 1998-04-27 1999-03-11 Apparatus and method of reading a program into a processor
AU31834/99A AU3183499A (en) 1998-04-27 1999-03-11 Apparatus and method of reading a program into a processor
HK01100256A HK1029470A1 (en) 1998-04-27 2001-01-11 Apparatus and method of reading a program into a processor

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/067,110 US6141756A (en) 1998-04-27 1998-04-27 Apparatus and method of reading a program into a processor
US09/067,110 1998-04-27

Publications (1)

Publication Number Publication Date
WO1999056428A1 true WO1999056428A1 (en) 1999-11-04

Family

ID=22073768

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1999/005322 WO1999056428A1 (en) 1998-04-27 1999-03-11 Apparatus and method of reading a program into a processor

Country Status (10)

Country Link
US (1) US6141756A (en)
EP (1) EP0990326A4 (en)
JP (1) JP2002507307A (en)
CN (1) CN1270468C (en)
AU (1) AU3183499A (en)
BR (1) BR9906398A (en)
CA (1) CA2292667C (en)
HK (1) HK1029470A1 (en)
IL (1) IL133247A0 (en)
WO (1) WO1999056428A1 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001065341A1 (en) * 2000-03-03 2001-09-07 Sony Computer Entertainment Inc. Information processing device and record medium
WO2001065342A1 (en) * 2000-03-02 2001-09-07 Sony Computer Entertainment Inc. Entertainment apparatus and loading method for digital information
WO2002015466A1 (en) * 2000-08-11 2002-02-21 Telefonaktiebolaget Lm Ericsson Securing arbitrary communication services
WO2002019064A2 (en) * 2000-09-01 2002-03-07 Conleth Buckley Method and system for preventing unwanted alterations of data and programs stored in a computer system
EP1500225A1 (en) * 2002-04-18 2005-01-26 International Business Machines Corporation Initializing, maintaining, updating and recovering secure operation within an integrated system employing a data access control function

Families Citing this family (78)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7236610B1 (en) * 1998-04-30 2007-06-26 Fraunhofer Gesellschaft Authenticating executable code and executions thereof
US6565443B1 (en) * 1999-09-14 2003-05-20 Innovative Gaming Corporation System and method for verifying the contents of a mass storage device before granting access to computer readable data stored on the device
GB9930145D0 (en) * 1999-12-22 2000-02-09 Kean Thomas A Method and apparatus for secure configuration of a field programmable gate array
US20070288765A1 (en) * 1999-12-22 2007-12-13 Kean Thomas A Method and Apparatus for Secure Configuration of a Field Programmable Gate Array
US6496971B1 (en) * 2000-02-07 2002-12-17 Xilinx, Inc. Supporting multiple FPGA configuration modes using dedicated on-chip processor
US7240218B2 (en) * 2000-02-08 2007-07-03 Algotronix, Ltd. Method of using a mask programmed key to securely configure a field programmable gate array
US6775776B1 (en) * 2000-06-27 2004-08-10 Intel Corporation Biometric-based authentication in a nonvolatile memory device
US6986052B1 (en) 2000-06-30 2006-01-10 Intel Corporation Method and apparatus for secure execution using a secure memory partition
US20020108054A1 (en) * 2001-02-02 2002-08-08 Moore Christopher S. Solid-state memory device storing program code and methods for use therewith
GB2373604B (en) * 2001-03-23 2004-10-27 Ibm A method and system for controlling use of software programs
US20020147918A1 (en) * 2001-04-05 2002-10-10 Osthoff Harro R. System and method for securing information in memory
US20030065919A1 (en) * 2001-04-18 2003-04-03 Albert Roy David Method and system for identifying a replay attack by an access device to a computer system
US7469341B2 (en) * 2001-04-18 2008-12-23 Ipass Inc. Method and system for associating a plurality of transaction data records generated in a service access system
US7921290B2 (en) * 2001-04-18 2011-04-05 Ipass Inc. Method and system for securely authenticating network access credentials for users
US20040015958A1 (en) * 2001-05-15 2004-01-22 Veil Leonard Scott Method and system for conditional installation and execution of services in a secure computing environment
GB0114317D0 (en) * 2001-06-13 2001-08-01 Kean Thomas A Method of protecting intellectual property cores on field programmable gate array
DE10142537A1 (en) * 2001-08-30 2003-03-20 Adp Gauselmann Gmbh Method for activating a control unit arranged in a housing, which is protected against spying on data
JP2003122442A (en) * 2001-10-16 2003-04-25 Sony Corp Wireless data communications method and apparatus for software download system
US20030135744A1 (en) * 2002-01-11 2003-07-17 International Business Machines Corporation Method and system for programming a non-volatile device in a data processing system
US7254720B1 (en) * 2002-02-13 2007-08-07 Lsi Corporation Precise exit logic for removal of security overlay of instruction space
JP2004007472A (en) * 2002-03-22 2004-01-08 Toshiba Corp Semiconductor integrated circuit, data transfer system, and data transfer method
DE10235380B4 (en) * 2002-08-02 2014-10-09 Robert Bosch Gmbh Method for dynamic memory management
US20040034785A1 (en) * 2002-08-15 2004-02-19 Horng-Ming Tai Hardware and firmware encryption mechanism using unique chip die identification
KR101047641B1 (en) * 2002-10-07 2011-07-08 텔레폰악티에볼라겟엘엠에릭슨(펍) Enhance security and privacy for security devices
EP1556992B1 (en) * 2002-10-31 2016-10-19 Telefonaktiebolaget LM Ericsson (publ) Secure implementation and utilization of device-specific security data
FI115564B (en) * 2003-02-03 2005-05-31 Nokia Corp Method and system for performing testing of a device and device
US7322042B2 (en) * 2003-02-07 2008-01-22 Broadon Communications Corp. Secure and backward-compatible processor and secure software execution thereon
US8131649B2 (en) 2003-02-07 2012-03-06 Igware, Inc. Static-or-dynamic and limited-or-unlimited content rights
US20100017627A1 (en) 2003-02-07 2010-01-21 Broadon Communications Corp. Ensuring authenticity in a closed content distribution system
US7779482B1 (en) 2003-02-07 2010-08-17 iGware Inc Delivery of license information using a short messaging system protocol in a closed content distribution system
JP4501349B2 (en) * 2003-03-13 2010-07-14 ソニー株式会社 System module execution device
US7725740B2 (en) * 2003-05-23 2010-05-25 Nagravision S.A. Generating a root key for decryption of a transmission key allowing secure communications
US8606885B2 (en) * 2003-06-05 2013-12-10 Ipass Inc. Method and system of providing access point data associated with a network access point
US20050071656A1 (en) * 2003-09-25 2005-03-31 Klein Dean A. Secure processor-based system and method
US7539862B2 (en) * 2004-04-08 2009-05-26 Ipass Inc. Method and system for verifying and updating the configuration of an access device during authentication
JP2006050148A (en) * 2004-08-03 2006-02-16 Yamatake Corp Telegraphic message communication method and telegraphic message communication apparatus
US7802110B2 (en) * 2004-08-25 2010-09-21 Microsoft Corporation System and method for secure execution of program code
JP4593207B2 (en) * 2004-08-31 2010-12-08 株式会社日立国際電気 Software defined radio system
US7818574B2 (en) * 2004-09-10 2010-10-19 International Business Machines Corporation System and method for providing dynamically authorized access to functionality present on an integrated circuit chip
US20060059373A1 (en) * 2004-09-10 2006-03-16 International Business Machines Corporation Integrated circuit chip for encryption and decryption using instructions supplied through a secure interface
US20060059368A1 (en) * 2004-09-10 2006-03-16 International Business Machines Corporation System and method for processing by distinct entities securely configurable circuit chips
US20060059574A1 (en) * 2004-09-10 2006-03-16 International Business Machines Corporation System for securely configuring a field programmable gate array or other programmable hardware
US20060059372A1 (en) * 2004-09-10 2006-03-16 International Business Machines Corporation Integrated circuit chip for encryption and decryption having a secure mechanism for programming on-chip hardware
WO2006053183A2 (en) * 2004-11-10 2006-05-18 Hillcrest Laboratories, Inc. Methods and systems for securing data processing devices
EP1825342A1 (en) 2004-11-22 2007-08-29 Nokia Corporation Method and device for verifying the integrity of platform software of an electronic device
US8234638B2 (en) * 2004-12-28 2012-07-31 Hercules Software, Llc Creating a relatively unique environment for computing platforms
CN100412796C (en) * 2005-05-29 2008-08-20 鸿富锦精密工业（深圳）有限公司 Built-in system and safety opening terminal method
JP4448800B2 (en) * 2005-07-07 2010-04-14 株式会社ソニー・コンピュータエンタテインメント Device controller
US7406711B2 (en) * 2005-09-02 2008-07-29 Motorola, Inc. Method and apparatus for enforcing independence of processors on a single IC
JP4931542B2 (en) * 2005-10-12 2012-05-16 パナソニック株式会社 Program loader having falsification verification function for load destination information, processor including program loader, data processing apparatus including processor, program loading method, and integrated circuit
US8127144B2 (en) * 2005-10-12 2012-02-28 Panasonic Corporation Program loader operable to verify if load-destination information has been tampered with, processor including the program loader, data processing device including the processor, promgram loading method, and integrated circuit
EP2033350A2 (en) 2006-05-02 2009-03-11 Broadon Communications Corp. Content management system and method
US20070288761A1 (en) * 2006-06-09 2007-12-13 Dale Jason N System and method for booting a multiprocessor device based on selection of encryption keys to be provided to processors
US7774616B2 (en) * 2006-06-09 2010-08-10 International Business Machines Corporation Masking a boot sequence by providing a dummy processor
US20070288738A1 (en) * 2006-06-09 2007-12-13 Dale Jason N System and method for selecting a random processor to boot on a multiprocessor system
US7594104B2 (en) * 2006-06-09 2009-09-22 International Business Machines Corporation System and method for masking a hardware boot sequence
US20070288740A1 (en) * 2006-06-09 2007-12-13 Dale Jason N System and method for secure boot across a plurality of processors
US20080077749A1 (en) * 2006-09-22 2008-03-27 Daniel Scott Cohen Access control of memory space in microprocessor systems
US20080077805A1 (en) * 2006-09-26 2008-03-27 Catherman Ryan C Securing Data Exchanged in Memory
US7624276B2 (en) 2006-10-16 2009-11-24 Broadon Communications Corp. Secure device authentication system and method
US7870395B2 (en) * 2006-10-20 2011-01-11 International Business Machines Corporation Load balancing for a system of cryptographic processors
US7613915B2 (en) 2006-11-09 2009-11-03 BroadOn Communications Corp Method for programming on-chip non-volatile memory in a secure processor, and a device so programmed
US8200961B2 (en) * 2006-11-19 2012-06-12 Igware, Inc. Securing a flash memory block in a secure device system and method
US7890559B2 (en) * 2006-12-22 2011-02-15 International Business Machines Corporation Forward shifting of processor element processing for load balancing
EP2120176A4 (en) * 2007-02-09 2016-05-18 Ntt Docomo Inc Terminal devic and method for checking a software program
JP4392672B2 (en) 2007-08-01 2010-01-06 Ｎｅｃシステムテクノロジー株式会社 Software defined radio communication apparatus, software update method, and software defined radio communication system
US8515080B2 (en) * 2007-12-19 2013-08-20 International Business Machines Corporation Method, system, and computer program product for encryption key management in a secure processor vault
US8661234B2 (en) * 2008-01-31 2014-02-25 Microsoft Corporation Individualized per device initialization of computing devices in avoidance of mass exploitation of vulnerabilities
TWI497414B (en) * 2009-06-23 2015-08-21 Phison Electronics Corp File executing method and system
CN101944034B (en) * 2009-07-03 2014-04-16 群联电子股份有限公司 File executing method and system
EP2362314A1 (en) * 2010-02-18 2011-08-31 Thomson Licensing Method and apparatus for verifying the integrity of software code during execution and apparatus for generating such software code
US8627097B2 (en) 2012-03-27 2014-01-07 Igt System and method enabling parallel processing of hash functions using authentication checkpoint hashes
US9881161B2 (en) 2012-12-06 2018-01-30 S-Printing Solution Co., Ltd. System on chip to perform a secure boot, an image forming apparatus using the same, and method thereof
KR20140073384A (en) * 2012-12-06 2014-06-16 삼성전자주식회사 system on chip for performing secure boot, image forming apparatus comprising it, and methods thereof
CN103326862B (en) * 2013-06-20 2017-02-22 天地融科技股份有限公司 Electronically signing method and system
US10616197B2 (en) * 2016-04-18 2020-04-07 Atmel Corporation Message authentication with secure code verification
EP3293978A1 (en) * 2016-09-09 2018-03-14 Nagravision S.A. Method for implementing a new default configuration in a host device and system therefor
CN114996725B (en) * 2022-05-06 2023-07-28 北京中科昊芯科技有限公司 Method for protecting development program and processor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5748940A (en) * 1995-08-17 1998-05-05 Compaq Computer Corporation Secure updating of non-volatile memory
US5844986A (en) * 1996-09-30 1998-12-01 Intel Corporation Secure BIOS
US5901225A (en) * 1996-12-05 1999-05-04 Advanced Micro Devices, Inc. System and method for performing software patches in embedded systems

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5937063A (en) * 1996-09-30 1999-08-10 Intel Corporation Secure boot

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5748940A (en) * 1995-08-17 1998-05-05 Compaq Computer Corporation Secure updating of non-volatile memory
US5844986A (en) * 1996-09-30 1998-12-01 Intel Corporation Secure BIOS
US5901225A (en) * 1996-12-05 1999-05-04 Advanced Micro Devices, Inc. System and method for performing software patches in embedded systems

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP0990326A4 *

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001065342A1 (en) * 2000-03-02 2001-09-07 Sony Computer Entertainment Inc. Entertainment apparatus and loading method for digital information
WO2001065341A1 (en) * 2000-03-03 2001-09-07 Sony Computer Entertainment Inc. Information processing device and record medium
US6948072B2 (en) 2000-03-03 2005-09-20 Sony Computer Entertainment Inc. Information processing device and record medium
WO2002015466A1 (en) * 2000-08-11 2002-02-21 Telefonaktiebolaget Lm Ericsson Securing arbitrary communication services
CN100342684C (en) * 2000-08-11 2007-10-10 艾利森电话股份有限公司 Securing arbitrary communication services
US7457956B2 (en) 2000-08-11 2008-11-25 Telefonaktiebolaget L M Ericsson (Publ) Securing arbitrary communication services
WO2002019064A2 (en) * 2000-09-01 2002-03-07 Conleth Buckley Method and system for preventing unwanted alterations of data and programs stored in a computer system
WO2002019064A3 (en) * 2000-09-01 2003-04-24 Conleth Buckley Method and system for preventing unwanted alterations of data and programs stored in a computer system
EP1500225A1 (en) * 2002-04-18 2005-01-26 International Business Machines Corporation Initializing, maintaining, updating and recovering secure operation within an integrated system employing a data access control function
EP1500225A4 (en) * 2002-04-18 2007-12-12 Ibm Initializing, maintaining, updating and recovering secure operation within an integrated system employing a data access control function

Also Published As

Publication number Publication date
CA2292667C (en) 2004-01-27
CN1270468C (en) 2006-08-16
HK1029470A1 (en) 2001-03-30
EP0990326A1 (en) 2000-04-05
CN1266571A (en) 2000-09-13
AU3183499A (en) 1999-11-16
CA2292667A1 (en) 1999-11-04
US6141756A (en) 2000-10-31
IL133247A0 (en) 2001-04-30
EP0990326A4 (en) 2007-05-02
JP2002507307A (en) 2002-03-05
BR9906398A (en) 2000-09-26

Similar Documents

Publication Publication Date Title
US6141756A (en) Apparatus and method of reading a program into a processor
KR100657532B1 (en) A method for securing an electronic device, a security system and an electronic device
KR100851631B1 (en) Secure mode controlled memory
JP4099039B2 (en) Program update method
JP4344115B2 (en) Method and microcomputer system for activating or deactivating an inspection mechanism of a control program stored in a memory device of a microcomputer system
EP1785902B1 (en) Decryption key table access control on ASIC or ASSP
US20070186117A1 (en) Secure processor-based system and method
US20070237325A1 (en) Method and apparatus to improve security of cryptographic systems
JP2004213216A (en) Information security microcomputer and its program developing device and program development system
US20040176068A1 (en) Architecture for encrypted application installation
JP2001060173A (en) Memory security protection system
CN113656086A (en) Method for safely storing and loading firmware and electronic device
KR101954439B1 (en) Soc having double security features, and double security method for soc
JP2006514321A (en) Architecture for installing encrypted applications
EP1465038B1 (en) Memory security device for flexible software environment
KR102324328B1 (en) security element
JP2009517972A (en) Method and apparatus for protecting digital content
KR101988404B1 (en) Soc having double security features, and double security method for soc
WO2007094857A1 (en) Method and apparatus for securing digital content
EP0962850A2 (en) A method for protecting embedded system software and embedded system
CN113343215A (en) Embedded software authorization and authentication method and electronic equipment
US20220317184A1 (en) Secured debug
WO2011050655A1 (en) Mobile terminal and method for system data anti-cloning thereof
KR100730708B1 (en) Architecture for encrypted applicationn installation
MXPA99011671A (en) Apparatus and method of reading a program into a processor

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 133247

Country of ref document: IL

Ref document number: 99800637.8

Country of ref document: CN

AK Designated states

Kind code of ref document: A1

Designated state(s): AL AM AT AU AZ BA BB BG BR BY CA CH CN CU CZ DE DK EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MD MG MK MN MW MX NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT UA UG UZ VN YU ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GH GM KE LS MW SD SL SZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG

ENP Entry into the national phase

Ref document number: 2292667

Country of ref document: CA

Ref document number: 2292667

Country of ref document: CA

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 1999913850

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: PA/a/1999/011671

Country of ref document: MX

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWP Wipo information: published in national office

Ref document number: 1999913850

Country of ref document: EP

REG Reference to national code

Ref country code: DE

Ref legal event code: 8642