WO1999067919A3 - Improved des and other cryptographic processes with leak minimization for smartcards and other cryptosystems - Google Patents

Improved des and other cryptographic processes with leak minimization for smartcards and other cryptosystems Download PDF

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Publication number
WO1999067919A3
WO1999067919A3 PCT/US1999/012734 US9912734W WO9967919A3 WO 1999067919 A3 WO1999067919 A3 WO 1999067919A3 US 9912734 W US9912734 W US 9912734W WO 9967919 A3 WO9967919 A3 WO 9967919A3
Authority
WO
WIPO (PCT)
Prior art keywords
des
smartcards
xor
equals
standard
Prior art date
Application number
PCT/US1999/012734
Other languages
French (fr)
Other versions
WO1999067919A2 (en
Inventor
Paul C Kocher
Joshua M Jaffe
Benjamin C Jun
Original Assignee
Cryptography Res Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=22207481&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=WO1999067919(A3) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Cryptography Res Inc filed Critical Cryptography Res Inc
Priority to CA002333095A priority Critical patent/CA2333095C/en
Priority to EP99951367.4A priority patent/EP1090480B1/en
Priority to JP2000556475A priority patent/JP2002519722A/en
Priority to IL13993599A priority patent/IL139935A/en
Priority to AU63816/99A priority patent/AU6381699A/en
Publication of WO1999067919A2 publication Critical patent/WO1999067919A2/en
Publication of WO1999067919A3 publication Critical patent/WO1999067919A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H04L9/0625—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/55—Detecting local intrusion or implementing counter-measures
    • G06F21/556—Detecting local intrusion or implementing counter-measures involving covert channels, i.e. data leakage between processes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60—Protecting data
    • G06F21/602—Providing cryptographic facilities or services
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
    • G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002—Countermeasures against attacks on cryptographic mechanisms
    • H04L9/003—Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/04—Masking or blinding
    • H04L2209/046—Masking or blinding of operations, operands or results of the operations
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/08—Randomization, e.g. dummy operations or using noise
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12—Details relating to cryptographic hardware or logic circuitry
    • H04L2209/127—Trusted platform modules [TPM]

Abstract

Methods and apparatuses are disclosed for improving DES and other cryptographic protocols against external monitoring attacks by reducing the amount (and signal-to-noise ratio) of useful information leaked during processing. An improved DES implementation of the invention instead uses two 56-bit keys (K1 and K2) (100) and two 64-bit plaintext messages (M1 and M2), each associated with a permutation (i.e., K1P, K2P and M1P, M2P) such that K1P {K1} XOR K2P {K2} equals the 'standard' DES key K (110), and M1P {M1} XOR M2P {M2} equals the 'standard' message. During operation (145) of the device, the tables are preferably periodically updated, by introducing fresh entropy into the tables faster than information leaks out, so that attackers will not be able to obtain the table contents by analysis of measurements. The technique is implementable in cryptographic smartcards, tamper resistant chips, and secure processing systems of all kinds.
PCT/US1999/012734 1998-06-03 1999-06-03 Improved des and other cryptographic processes with leak minimization for smartcards and other cryptosystems WO1999067919A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
CA002333095A CA2333095C (en) 1998-06-03 1999-06-03 Improved des and other cryptographic processes with leak minimization for smartcards and other cryptosystems
EP99951367.4A EP1090480B1 (en) 1998-06-03 1999-06-03 Improved des and other cryptographic processes with leak minimization for smartcards and other cryptosystems
JP2000556475A JP2002519722A (en) 1998-06-03 1999-06-03 Improved DES and other cryptographic processes for smart cards and other cryptographic systems to minimize leakage
IL13993599A IL139935A (en) 1998-06-03 1999-06-03 Des and other cryptographic processes with leak minimization for smartcards and other cryptosystems
AU63816/99A AU6381699A (en) 1998-06-03 1999-06-03 Improved des and other cryptographic processes with leak minimization for smartcards and other cryptosystems

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US8782698P 1998-06-03 1998-06-03
US60/087,826 1998-06-03

Publications (2)

Publication Number Publication Date
WO1999067919A2 WO1999067919A2 (en) 1999-12-29
WO1999067919A3 true WO1999067919A3 (en) 2000-03-23

Family

ID=22207481

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1999/012734 WO1999067919A2 (en) 1998-06-03 1999-06-03 Improved des and other cryptographic processes with leak minimization for smartcards and other cryptosystems

Country Status (7)

Country Link
US (3) US6278783B1 (en)
EP (1) EP1090480B1 (en)
JP (1) JP2002519722A (en)
AU (1) AU6381699A (en)
CA (1) CA2333095C (en)
IL (1) IL139935A (en)
WO (1) WO1999067919A2 (en)

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