WO2000019607A1 - Dual band transmitter for a cellular phone comprising a pll - Google Patents

Dual band transmitter for a cellular phone comprising a pll Download PDF

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Publication number
WO2000019607A1
WO2000019607A1 PCT/US1999/022068 US9922068W WO0019607A1 WO 2000019607 A1 WO2000019607 A1 WO 2000019607A1 US 9922068 W US9922068 W US 9922068W WO 0019607 A1 WO0019607 A1 WO 0019607A1
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WO
WIPO (PCT)
Prior art keywords
output
frequency
vco
phase detector
input
Prior art date
Application number
PCT/US1999/022068
Other languages
French (fr)
Inventor
Morten Damgaard
Leo L. Li
Original Assignee
Conexant Systems, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Conexant Systems, Inc. filed Critical Conexant Systems, Inc.
Publication of WO2000019607A1 publication Critical patent/WO2000019607A1/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/005Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J5/00Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner
    • H03J5/24Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with a number of separate pretuned tuning circuits or separate tuning elements selectively brought into circuit, e.g. for waveband selection or for television channel selection
    • H03J5/242Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with a number of separate pretuned tuning circuits or separate tuning elements selectively brought into circuit, e.g. for waveband selection or for television channel selection used exclusively for band selection
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J5/00Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner
    • H03J5/24Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with a number of separate pretuned tuning circuits or separate tuning elements selectively brought into circuit, e.g. for waveband selection or for television channel selection
    • H03J5/242Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with a number of separate pretuned tuning circuits or separate tuning elements selectively brought into circuit, e.g. for waveband selection or for television channel selection used exclusively for band selection
    • H03J5/244Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with a number of separate pretuned tuning circuits or separate tuning elements selectively brought into circuit, e.g. for waveband selection or for television channel selection used exclusively for band selection using electronic means
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/185Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using a mixer in the loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40Circuits
    • H04B1/403Circuits using the same oscillator for generating both the transmitter frequency and the receiver local oscillator frequency
    • H04B1/406Circuits using the same oscillator for generating both the transmitter frequency and the receiver local oscillator frequency with more than one transmission mode, e.g. analog and digital modes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/10Indirect frequency synthesis using a frequency multiplier in the phase-locked loop or in the reference signal path

Definitions

  • the invention relates to transmitters used in a communications system. More particularly, the invention relates to a phase-locked loop (PLL) of a dual band transmitter used in a wireless phone, such as a dual band cellular phone for mobile communications systems.
  • PLL phase-locked loop
  • GSM Global System for Mobile communications
  • ETSI European Telecommunications Standards Institute
  • GSM Global System for Mobile communications
  • ETSI European Telecommunications Standards Institute
  • AMPS Advanced Mobile Phone System
  • PCS Personal Communications System
  • MHz are now used to expand the capacities of certain networks. Manufacturer of cellular phones, therefore, are developing a new generation of cellular phones which are operable at, for example, two frequency bands.
  • a cellular phone operable at two frequency bands is referred to as a dual band cellular phone.
  • the dual band cellular phone has to transmit signals at both frequency bands, duplication of functions is required.
  • a second PLL is required in a GSM900/DCS1800 dual band cellular telephone having transmit frequency bands between 890 MHz and 915 MHz for the GSM band, and between 1710 MHz and 1785 MHz for the DCS 1800 band.
  • VCO voltage-controlled oscillators
  • An aspect of the invention involves a cellular phone for a mobile communications system.
  • the phone is operable in a first radio frequency band .and a second radio frequency band and comprises a dual band transmitter and an antenna.
  • the dual band transmitter comprises a phase-locked loop (PLL) which can generate two or more output frequency ranges.
  • the PLL comprises a first frequency divider configured to divide a frequency signal by a value N, a phase detector responsive to an output of the first divider, and a loop filter responsive to an output of the phase detector.
  • a voltage-controlled oscillator (VCO) is responsive to an output of the loop filter and a frequency multiplier is responsive to an output of the VCO.
  • VCO voltage-controlled oscillator
  • a band-switch has a first input responsive to the output of the VCO, a second input responsive to an output of the frequency multiplier, and a third input responsive to a control signal to select for output from said band-switch one of the first and second inputs.
  • a mixer has two inputs, one mixer input is responsive to the output of the band-switch and a second mixer input is responsive to a radio frequency signal.
  • a second frequency divider is configured to divide an input frequency by a value M. The second divider is responsive to an output of the mixer, and an output of the second frequency divider provides an input to the phase detector.
  • Another aspect of the invention involves a method for generating at least two output frequency ranges from a phase locked loop (PLL) in a cellular phone for a mobile communications system.
  • PLL phase locked loop
  • the PLL includes a phase detector, a loop filter, and a single voltage-controlled oscillator (VCO).
  • VCO voltage-controlled oscillator
  • An output of the VCO is multiplied by a predetermined value to produce a multiplied output, and a desired output frequency is selected. Either the output of the VCO or the multiplied output are selectively fed back to the phase detector, based upon the selected desired output frequency. When the output of the VCO is selected, the output of the VCO is fed back, and when the multiplied output is selected, the multiplied output is fed back.
  • a further aspect of the invention involves a dual band transmitter for a wireless phone.
  • the dual band transmitter comprises a first power ampUfier, a second power amplifier and a phase locked loop (PLL).
  • the first power amplifier has a first input for a first signal in a first radio frequency band, and a first output for an amplified first signal.
  • the first output is connectable to an antenna.
  • the second power amplifier has a second input for a second signal in a second radio frequency band and a second output for an amplified second signal.
  • the second output is connectable to the antenna.
  • the PLL can generate two or more output frequency ranges and comprises a first frequency divider configured to divide a frequency signal by a value N.
  • a phase detector is responsive to an output of the first divider and a loop filter is responsive to an output of the phase detector.
  • a voltage-controlled oscillator (VCO) is responsive to an output of the loop filter and a frequency multiplier is responsive to an output of the VCO.
  • a band-switch has a first input responsive to the output of the VCO, a second input responsive to an output of the frequency multiplier, and a third input responsive to a control signal to select for output from the band-switch one of the first and second inputs.
  • a mixer has two inputs, one mixer input is responsive to the output of the band-switch and a second mixer input is responsive to a radio frequency signal.
  • a second frequency divider is configured to divide an input frequency by a value M. The second divider is responsive to an output of the mixer, and an output of the second frequency divider provides an input to the phase detector.
  • a further aspect of the invention involves a dual band transmitter for a wireless phone.
  • the dual band transmitter comprises a first power amplifier, a second power amplifier and a phase locked loop (PLL).
  • the first power amplifier has a first input for a first signal in a first radio frequency band, and a first output for an amplified first signal.
  • the first output is connectable to an antenna.
  • the second power amplifier has a second input for a second signal in a second radio frequency band and a second output for an amplified second signal.
  • the second output is connectable to the antenna.
  • the PLL can generate two or more output frequency ranges.
  • the PLL comprises a first frequency divider configured to divide a frequency signal by a value N, a phase detector responsive to an output of the first frequency divider and a loop filter responsive to an output of the phase detector.
  • a voltage-controlled oscillator (VCO) is responsive to an output of the loop filter, and at least one frequency multiplier is responsive to an output of the VCO.
  • VCO voltage-controlled oscillator
  • a mixer has two inputs, one mixer input is responsive to the output of the VCO and a second mixer input is responsive to a local oscillator signal.
  • the second frequency divider is configured to divide an input frequency by a value M and connected to an output of the mixer.
  • An output of the second divider provides an input to the phase detector, and a selector is connected to the output of the at least one frequency multiplier. The selector is configured to select an output frequency.
  • the phone is operable in a first radio frequency band and a second radio frequency band, and comprises a dual band transmitter and an antenna.
  • the dual band transmitter comprises a phase-locked loop (PLL) which can generate two or more output frequency ranges.
  • the PLL comprises a first frequency divider configured to divide a frequency signal by a value N, and a phase detector responsive to an output of the first frequency divider.
  • a loop filter is responsive to an output of the phase detector and a voltage- controlled oscillator (VCO) is responsive to an output of the loop filter.
  • At least one frequency multiplier is responsive to an output of the VCO.
  • a mixer has two inputs, one mixer input is responsive to the output of the VCO and a second mixer input is responsive to a local oscillator signal.
  • a second frequency divider is configured to divide an input frequency by a value M and is connected to an output of the mixer.
  • a output of the second divider provides an input to the phase detector.
  • a selector is connected to the output of the at least one frequency multiplier and is configured to select an output frequency.
  • a further aspect of the invention involves a method for generating at least two output frequency ranges from a phase locked loop (PLL) in a cellular phone for a mobile communications system.
  • the PLL comprises a single voltage controlled oscillator (VCO), an adjustable first frequency divider which divides by a value N, a second frequency divider which divides by a value M, a phase detector, and a loop filter.
  • VCO voltage controlled oscillator
  • the method comprises multiplying an output of the VCO by a predetermined value to produce a multiplied output frequency, selecting a desired output frequency of one of the VCO output and the multiplied output frequency, and adjusting the values of the first frequency divider such that a ratio N/M equals the value of the predetermined value when the multiplied output is selected, and adjusting the ratio N/M equal to the value "1" when the VCO output is selected.
  • the dual band transmitter comprises a first power amplifier, a second power amplifier, and a phase locked loop (PLL).
  • the first power amplifier has a first input for a first signal in a first radio frequency band, and a first output for an amplified first signal. The first output is connectable to an antenna.
  • the second power amplifier has a second input for a second signal in a second radio frequency band and a second output for an amplified second signal. The second output is connectable to the antenna.
  • the PLL can generate two or more output frequency ranges.
  • the PLL comprises a voltage-controlled oscillator (VCO) having a first output connected to said first power amplifier.
  • the VCO generates the first signal.
  • a frequency multiplier has an input connected to the first output of the VCO and a second output connected to the second power amplifier. The frequency multiplier receives the first signal and generates the second signal.
  • VCO voltage-controlled oscillator
  • a further aspect of the involves a method for generating two output frequency ranges from a phase locked loop (PLL) in a dual band transmitter for a wireless phone.
  • the PLL comprises a single voltage controlled oscillator (VCO).
  • the method comprises multiplying an output of the VCO by a predetermined value to produce a multiplied output frequency, and- selecting a desired output frequency of one of the VCO output and the multiplied output frequency.
  • Another aspect of the invention involves a cellular phone for a mobile communications system.
  • the phone is operable in a first radio frequency band and a second radio frequency band, and comprises a dual band transmitter and an antenna.
  • the dual band transmitter includes a phase-locked loop (PLL) which can generate two or more output frequency ranges.
  • PLL phase-locked loop
  • the PLL comprises a voltage-controlled oscillator (VCO) which has a first output connected to the first power ampUfier and which generates the first signal.
  • VCO voltage-controlled oscillator
  • a frequency multiplier has an input connected to said first output of the VCO and a second output connected to said second power amplifier. The frequency multiplier receives the first signal and generates the second signal.
  • Figure 1 is a schematic illustration of a cellular phone cut away to show a portion of the motherboard.
  • Figure 2 is a simplified illustration of a transmit path of the cellular phone shown in Figure 1.
  • FIG. 3 is a block diagram showing a basic Phase-Locked Loop (PLL).
  • PLL Phase-Locked Loop
  • Figure 4 is a block diagram of a PLL frequency synthesizer utilizing a program counter in the feedback loop.
  • Figure 5 is a block diagram of a PLL wherein the feedback loop contains a mixer.
  • Figure 6 is a block diagram of a PLL according to a first embodiment of the present invention, wherein a frequency doubler and a band-switch are used to provide two different output frequency ranges.
  • Figure 7 is a block diagram of a PLL according to a second embodiment of the present invention.
  • Figure 8 is a block diagram of a PLL according to a third embodiment of the present invention, wherein multiplier blocks and a selector are incorporated outside of the feedback loop;
  • Figure 9 is a block diagram of a PLL according to a fourth embodiment of the present invention.
  • Figure 10 is a simplified block diagram of a dual band transmitter
  • FIG 11 is a simplified schematic a PLL including a frequency doubler circuit Detailed Description of the Preferred Embodiment A preferred embodiment of the invention is described with reference to a cellular phone for use in a mobile communications system. It is contemplated that the invention is equally applicable in other wireless devices such as conventional cordless phones for home or office use.
  • a mobile communications system for example according to the GSM standard, is structured to have a variety of individual regions called cells, and to comprise a variety of fixed transceiver stations called base transceiver stations, and a plurality of mobile stations, the cellular phones.
  • base transceiver stations a variety of fixed transceiver stations
  • mobile stations the cellular phones.
  • one base transceiver station defines one cell and handles telephone traffic to and from cellular phones which are currently located in the cell.
  • FIG 1 schematically illustrates a dual band cellular phone 3 made in accordance with the invention.
  • a portion of the case of the dual band cellular phone 3 is cut away to show a motherboard 5 of the cellular phone 3 with a dual band transmitter 1 positioned thereon.
  • the cellular phone 3 comprises a plurality of other components and functional modules, such as the components of a receive path and a transmit path.
  • the cellular phone 3 further includes an antenna 11, a display and a keypad.
  • the receive path of such a dual band cellular phone 3 includes a radio frequency (RF) receiver, an analog-to-digital converter, a demultiplexer and a demodulator.
  • the transmit path comprises a multiplexer, modulator, digital-to-analog converter and an RF transmitter.
  • Further functional modules include, for example, a channel coder/decoder and a speech coder/decoder.
  • Both the RF receiver and the RF transmitter are usually connected to the antenna 11 by means of a diode switch (eventually in combination with a band selector) which connects the antenna 11 either to the RF receiver or to the RF transmitter.
  • the RF transmitter comprises an amplifier stage for amplifying the RF signals according to electrical characteristics, for example, a defined power level versus time profile and a defined spectral mask, before the RF signals are fed to the antenna 2 and emitted as radio signals.
  • the spectral mask and the power level versus time profile are defined in GSM
  • FIG. 2 illustrates a simplified embodiment of the transmit path of the dual band cellular phone 3.
  • the receive path is indicated by means of a receiver la which includes, for example, the radio frequency (RF) receiver.
  • the transmitter 1, which includes two power amplifiers, and a processing module 7 are positioned on the motherboard and interconnected between the antenna 2 and a microphone 9 of the cellular phone 3.
  • the processing module 7 performs most speech and signal processing in a transmit direction, for example, voice encoding and channel encoding.
  • the dual band transmitter 1 transforms the encoded signals into the RF domain.
  • the illustrated separation into a signal processing module 7 and a dual band transmitter 1 is for illustrative purposes only. Those skilled in the art will appreciate that other separations are possible. For instance, one definition may be that a dual band transmitter only includes power amplifiers and any modulation is performed, for example, in the signal processing module 7. In the following description, the dual band transmitter 1 performs all RF processing.
  • the dual band transmitter modulates an RF carrier of, for example, nominal either 900 MHz or 1800 MHz with the processed speech signal.
  • the RF signals emitted from the dual band transmitter 1 have frequencies within a transmit band of 890 MHz to 915 MHz for GSM900, and 1710 MHz to 1785 MHz for DCS1800.
  • the dual band transmitter 1 includes a phase-locked loop (PLL) which dete ⁇ nines the transmit bands and provides for frequency stability and accuracy.
  • PLL phase-locked loop
  • FIG 3 illustrates a standard Phase-Locked Loop (PLL).
  • the basic PLL has an input signal having an input frequency f, n which is divided by a divider 4, wherein the divider 4 divides the input frequency fj n by a value N.
  • the output of the divider 4 is then input into a phase detector 6.
  • the phase detector 6 outputs a voltage that is proportional to a phase difference between two input signals (frequencies).
  • This phase detector output voltage is then input into a loop filter 8.
  • the loop filter 8 smoothes the phase detector output voltage and determines the loop performance based upon selected loop filter values.
  • the output of the loop filter 8 adjusts a voltage-controlled oscillator (VCO) 10 and determines the output frequency of the VCO 10.
  • VCO voltage-controlled oscillator
  • the output of the VCO 10 is then fed back as an input to the phase detector 6 via a feedback loop 14.
  • the output voltage of the phase detector 6 will vary according to any change in the phase difference between the output frequency of the VCO 10 and the input frequency fj n .
  • the feedback loop 14 thus provides a means of "locking" the phase of an output frequency fj, ut in accordance with the phase of the input frequency f n . If the input frequency fj n is a highly stable reference frequency, the PLL produces a highly stable output frequency f out .
  • the PLL produces an output frequency f out , equal to the value [fj n / N], wherein the phase of the VCO output frequency f ⁇ ut follows the phase of the input frequency fj n .
  • a divider 16 may be used in the feedback loop 14 in order to change the output frequency f out .
  • the output frequency f out from the VCO 10 is equal to the value [(f, n * M) N]. If the divider 16 is implemented using a programmable counter, the value of M can be changed. Thus, the output frequency f out can be adjusted to a desired value by varying the value of "M".
  • FIG. 5 illustrates an application of a PLL.
  • a phase modulated intermediate input frequency LF is input to the first divider 4 of the PLL.
  • the feedback loop 14 contains two additional blocks, however.
  • a mixer 22 mixes a local oscillator signal RF L o (frequency RF LO ) with a signal RF OUT (frequency RF OUT ) and the output of the mixer 22 is input into a bandpass (BP) filter 24.
  • the output of the mixer 22 may be referred to as the "feedback frequency".
  • the feedback frequency can be selected from one of the numerous frequencies produced by a harmonic mixing within the mixer 22. In general, the output of the mixer 22 is equal to [ ⁇ n*RFou ⁇ ⁇ m*RF L o].
  • the selected outputs of the mixer 22 are either RFO U T - RF LO or RFL O - RF OU T (assuming frequency down-conversion).
  • the bandpass filter 24 removes any unwanted mixing products produced by the mixer
  • a low-pass filter can be used instead of the bandpass filter 24 .
  • the purpose of a filter is to prevent any unwanted mixing products and the local oscillator signal RF L o from reaching the divider 16 and/or the phase detector 6. At the same time, the filter must pass the desired feedback frequency. In embodiments in which the wanted feedback frequency is lower than the local oscillator signal RF L o and other mixing products, a low-pass filter is sufficient to pass only the desired feedback frequency.
  • the remaining blocks operate as described in the previous figures.
  • the PLL translates (i.e.. moves) the frequency of the input signal IF to the VCO frequency with the same phase.
  • a desired output frequency RF OUT can be produced for a given intermediate frequency LF.
  • fa is the feedback frequency output by the mixer 22
  • v-co is the VCO frequency
  • n is the input frequency.
  • the variables " «" and " " are integer multipliers generated by the harmonic mixing.
  • the PLL block operates generally as described in Figure 5. However, the illustrated PLL includes two additional components, a frequency doubler 28 and a band-switch 38.
  • the band-switch 38 is connected directly to the output of the VCO 10 (i.e. the band-switch 38 is in a position "38a"), the circuit operates as described above with reference to Figure 5. That is,
  • the band-switch 38 When the band-switch 38 is in a position "38b", the operation of the PLL is different. Instead of the output of the VCO 10 being fed back to the mixer 22, the output of the frequency doubler 28 is fed back to the mixer 22.
  • the frequency doubler 28 doubles the input frequency supplied by the VCO 10 and outputs a signal RF 0U ti (frequency RF 0U u)- While the operation of the presently preferred embodiment is illustrated and described using a frequency doubler, the principles of the present invention may be implemented with any frequency multiplier (or divider) without departing from the teachings herein.
  • the frequency doubler 28 could actually divide the VCO output frequency by 2, or could triple the frequency supplied by the VCO 10.
  • the term "multiplier" as used herein encompasses a divider, since multiplying by Vz is equivalent to dividing by 2.
  • J f OUT + — J f 6 M A ⁇ ⁇ + ⁇ . f L0
  • the loop gain of the PLL doubles, assuming that the M divider 16 value is kept constant. If the value of M was changed to compensate for the loop gain, the phase relationship between the input .and output frequencies would also change. Thus, there is a need to compensate for the loop gain of the circuit when the band-switch 38 is connected to the frequency doubler output.
  • This problem may be solved by either having a loop filter 8 with a selectable gain, a phase detector 6 with a selectable gain, or by having both a loop filter 8 and a phase detector 6 with a selectable gain.
  • a control signal line 40 is input to the band-switch 38, the phase detector 6 and/or the loop filter 8.
  • the gain of the phase detector 6 and/or the loop filter 8 are set to the required values for taking the output directly from the VCO 10.
  • the band-switch 38 is set to position "38b" by the control signal on the control signal line 40, the gain of the phase detector 6 and/or the loop filter 8 is set to the required value for taking the output from the frequency doubler 28.
  • the VCO can be designed to output the frequency range 855-915 MHz. Taking the output frequency directly from the VCO provides the necessary frequency range for the GSM900 transmit band (890-915 MHz). Switching the band-switch 38 to position "38b" doubles the output frequency, and provides the frequencies of 1710-1785 MHz required for the DCS1800 transmit band.
  • Figure 7 illustrates a second embodiment of the present invention.
  • the M value is kept constant. However, the value of M may be adjusted in order to compensate for the loop gain. If M is adjusted, though, the value of N is also adjusted in order to output the desired frequency.
  • a control signal on the control signal line 41 adjusts the values of N and M, as required. Additionally, the gain of the phase detector and/or loop filter may also be adjusted if necessary (not shown).
  • a conventional method for generating a constant envelope modulated signal is shown in Figure 5.
  • a Phase Locked Loop (PLL) has a modulated signal LF input as the reference input to the phase detector 6.
  • a modulated signal can be generated which is equal to H * f ⁇ , wherein £ is the output frequency of the VCO.
  • the N/M ratio is equal to the multiplication factor "H” applied to the VCO output frequency. This design requirement keeps the modulation index (and the modulation bandwidth) equal at the input and output of the loop.
  • a third embodiment of a PLL is shown.
  • the output of the VCO 10 is fed back to the mixer 22, and the loop operates generally as described with reference to Figure 5.
  • the output of the VCO 10 is also input to two multiplier blocks 46, 48.
  • the multiplier blocks 46, 48 multiply the output of the VCO 10 by the values "Hi” and "H 2 ".
  • Hi can be set equal to "1" and H 2 equal to "2".
  • the GSM900 band (890 - 915 MHz) can be provided.
  • the DCS1800 band (1710 - 1785 MHz) can be provided.
  • a control signal Une 54 controls an output selector 50 in order to output a signal of the desired frequency.
  • the control signal line 54 also adjusts the value of N, according to which output frequency is selected, in order to keep the N/M ratio equal to the multiplier H. It is desirable to keep M constant, in order not to change the loop gain of the circuit. Therefore, it is preferable to adjust only the N value. However, it is not always possible to adjust only the N value and still cover the desired frequency ranges.
  • Figure 9 illustrates a fourth embodiment of the present invention.
  • This embodiment is similar to the embodiment of Figure 8, except that the value of M is adjustable, as well as the value of N. This allows for greater flexibility in designing the circuit to cover desired output frequency ranges. If the value of M is adjusted, however, the loop gain changes. Therefore, in order to compensate for the loop gain, the gain of the phase detector 6 and/or the loop filter 8 are also adjusted.
  • An advantage of this architecture over the prior art is that only one VCO is required to provide two (or more) frequency bands. Also, the mixer 22 in the loop always has the same input frequency range, allowing the mixer to be optimized for a given application.
  • the modulation of input LF can remain unchanged, when the modulation is identical for the two bands (as it is in the present case for the GSM900/DCS1800 bands).
  • the N and M dividers can be made programmable to allow easy adjustment of the N/M ratio, and to allow multi-band operation.
  • FIG 10 shows a simplified block diagram of the dual band transmitter 1 shown in Figure 1.
  • the dual band transmitter 1 includes the PLL shown in Figure 6.
  • the dual band transmitter 1 further includes a mixer stage 71 and a power ampUfier stage 75.
  • the PLL 73 is interposed between the mixer stage 71 and the power amplifier stage 75, wherein the PLL 73 receives an RF signal having an intermediate frequency (LF) from the mixer stage 71 and feeds an RF signal RF OUTI , RFoirrc to the power amplifier stage 75.
  • LF intermediate frequency
  • the power ampUfier stage 75 comprises two power amplifiers 58 , 60 connected to the antenna 11 via a band selector 64.
  • the power amplifier 58 is optimized for signals in the 900 MHz range and receives the signal RFou ⁇
  • the power amplifier 60 is optimized for signals in the 1800 MHz range and receives the signal RF 0 u ⁇ -
  • the power amplifier 58 may advantageously be the same as a power amplifier device RF130
  • the power amplifier 60 may advantageously be the same as a power amplifier device RF230, both available from Rockwell Semiconductor Systems.
  • the power amplifiers 58, 60 can be implemented in a single power ampUfier module.
  • a controller 62 is connected to outputs 80, 82 and control inputs 84, 86 of the power amplifiers 58, 60. It is contemplated that only one of the power amplifiers 58, 60 is active at a time.
  • the controller 62 monitors the output power level of the active power amplifier 58, 60 and generates a control signal for the active power amplifier 58, 60 so that the RF signal fed to the antenna 11 achieves and maintains, for example, a prescribed power level versus time profile as defined in the GSM standard (GSM 05.05).
  • the band selector 64 can be configured as a switch or diplexer which connects only one of the power amplifiers 58, 60 at a time to the antenna 11 and prevents that an RF signal from an active power amplifier 58, 60 is fed to the output 80, 82 of the inactive power amplifier 58, 60.
  • the power amplifiers 58, 60 are controlled by a single controller 62.
  • the power ampUfiers 58, 60 share one controller 62 so that no duplication of control circuits is necessary resulting in cost savings for dual band cellular phones.
  • the controller 62 controls the power amplifiers 58 or 60.
  • the frequency band which the cellular phone uses to communicate with the base transceiver station is determined by external factors.
  • An internal central controller (not shown) of the cellular phone 3 selects the RF carrier and generates a control signal depending on these external factors.
  • the control signal controls a switch (not shown) to connect the controller 62 to the power amplifier 58 or to the power amplifier 60.
  • the controller 62 is connected to one of the power amplifiers 58, 60, the respective power amplifier 58, 60 is activated while the other power amplifier 58, 60 remains deactive or is deactivated.
  • the mixer stage 71 comprises an I/Q modulator formed by two mixers 68, 70 which receive differential I and Q baseband signals Txl, TxQ.
  • the signals Txl, TxQ are low pass filtered and then applied to the mixers 68, 70 which are, for example, double balanced mixers.
  • a phase shifter 66 shifts a signal (LO signal) from a local oscillator (not shown) by 90 degrees and feeds the local oscillator signal to the mixers 68, 70.
  • the mixer 70 is connected to an input 76 for the I baseband signal, and the mixer 68 is connected to an input 78 for the Q baseband signal.
  • Each mixer 68, 70 generates a modulated signal having the fundamental frequency and harmonic frequencies.
  • An adder 72 combines the modulated signals of the mixers 68, 70 and feeds a sum signal to a band pass filter 74 which is connected to the divider 4 of the PLL.
  • the band pass filter 74 has a pass band of about 400 MHz to block undesired frequency components, particularly the third harmonic of the fundamental frequency.
  • An I/Q modulator is also referred to, for example, as a quadrature modulator or as a single-side-band (SSB) modulator.
  • SSB single-side-band
  • FIG 11 shows an embodiment of the frequency doubler 28, for example, shown in Figure 10.
  • the frequency doubler 28 has an input 88 and an output 90 to connect to the VCO 10 and the mixer 22, respectively.
  • the frequency doubler 28 comprises capacitors C1-C7, inductors L1-L4, resistors Rl, R2, SL1-SL3 (strip lines) and a transistor T having a base, an emitter and a collector.
  • the transistor T is a bipolar high frequency transistor. In one embodiment, the transistor T is a BFG505 available from Siemens.
  • the stripline SL1 is connected to the input 88, the grounded capacitor Cl and the capacitor C2.
  • the capacitor 2 is connected to the grounded inductor L2, the grounded resistor R2 and the base of the transistor T.
  • the capacitors Cl and C2 have capacitances of about 5.6 pF and 4.0 pF, respectively, and the inductor L2 has an inductance of about 12 nH.
  • the resistor R2 has a resistance of about 300 ohms.
  • the emitter of the transistor T is connected to the grounded resistor Rl and the grounded capacitor C6.
  • the capacitor C6 has a capacitance of about 15 pF and the resistor Rl has a resistance of about 100 ohms in the present embodiment.
  • the collector of the tr.ansistor T is connected to the stripline SL2 and the capacitor C5.
  • the stripline SL2 is further connected to the grounded capacitor C3 and the inductor LI which is connected to a voltage supply VDD of about 5 volts.
  • the capacitor C5 is further connected to the grounded inductor L4 and the inductor L3.
  • the inductor L3 is connected to the grounded capacitor C7 and the stripline SL3 which is connected to the output 90.
  • the inductors LI, L4 have inductances of about 10 nH each, and the inductor L3 has an inductance of about 2.7 nH.
  • the capacitors C5 and C7 have capacities of about 1.5 pF and 1.8 pF, respectively.
  • the striplines SL1 and SL3 are 50-ohm lines and assist in matching the input impedance and the output impedance.
  • the transistor T is a central element of the frequency doubler 28. Because of its nonlinear transfer characteristic, the transistor T generates harmonics.
  • the circuitry connected between the collector and the output 90 is configured to pass only second harmonic and to block all other frequencies.

Abstract

Disclosed is a dual band wireless phone, such as a cellular phone for a mobile communications system, with a dual band transmitter (1) that includes a phase-locked loop (PLL) (73). The dual band transmitter (1) includes first and second power amplifiers (58, 60) and the PLL. The first power amplifier (58) has a first input for a first signal at a first radio frequency band, and a first output (80) for an amplified first signal. The second power amplifier (60) has a second input for a second signal at a second radio frequency band and a second output (82) for an amplified second signal. The outputs of the power amplifiers are connectable to an antenna (11). The PLL generates two outputs frequency ranges and includes a voltage-controlled oscillator (VCO) (10) which has a first output connected to the first power amplifier and generates a first signal. A frequency multiplier (28) has an input connected to the first output of the VCO (10) and a second output connected to the second power amplifier (60). The frequency multiplier receives the first signal and generates the second signal.

Description

DUAL BAND TRANSMITTER FOR A CELLULAR PHONE COMPRISING A PLL
Background of the Invention The invention relates to transmitters used in a communications system. More particularly, the invention relates to a phase-locked loop (PLL) of a dual band transmitter used in a wireless phone, such as a dual band cellular phone for mobile communications systems.
Cellular phones are designed to operate within the environment of one of several mobile communications networks. An exemplary environment is a mobile communications network according to a standard known as GSM (Global System for Mobile communications) created by the European Telecommunications Standards Institute (ETSI). In GSM, there is .an assigned frequency band around 900 MHz for Standard GSM, and an assigned frequency band around 1800 MHz for DCS 1800 (Digital Communications System, DCS). Other environments include systems known as Advanced Mobile Phone System (AMPS) operating in a frequency band around 800 MHz, and as Personal Communications System (PCS) operating in a frequency band around 1900 MHz.
As the number of users of cellular phones increases, some operators have added capacity to their networks by including more than only one frequency band in their networks.
In the case of the GSM system, for example, the frequency bands around 900 MHz and 1800
MHz are now used to expand the capacities of certain networks. Manufacturer of cellular phones, therefore, are developing a new generation of cellular phones which are operable at, for example, two frequency bands. A cellular phone operable at two frequency bands is referred to as a dual band cellular phone. As the dual band cellular phone has to transmit signals at both frequency bands, duplication of functions is required.
For example, a second PLL is required in a GSM900/DCS1800 dual band cellular telephone having transmit frequency bands between 890 MHz and 915 MHz for the GSM band, and between 1710 MHz and 1785 MHz for the DCS 1800 band. This would require using two separate voltage-controlled oscillators (VCO), which adds complexity and expense to the over-all system design. Duplication of functions such as VCOs, however, leads to higher manufacturing costs and ultimately to higher prices for the dual band cellular phones. Summary of the Invention
There is therefore a need to keep the manufacturing costs caused by duplication of functions as low as possible.
An aspect of the invention involves a cellular phone for a mobile communications system. The phone is operable in a first radio frequency band .and a second radio frequency band and comprises a dual band transmitter and an antenna. The dual band transmitter comprises a phase-locked loop (PLL) which can generate two or more output frequency ranges. The PLL comprises a first frequency divider configured to divide a frequency signal by a value N, a phase detector responsive to an output of the first divider, and a loop filter responsive to an output of the phase detector. A voltage-controlled oscillator (VCO) is responsive to an output of the loop filter and a frequency multiplier is responsive to an output of the VCO. A band-switch has a first input responsive to the output of the VCO, a second input responsive to an output of the frequency multiplier, and a third input responsive to a control signal to select for output from said band-switch one of the first and second inputs. A mixer has two inputs, one mixer input is responsive to the output of the band-switch and a second mixer input is responsive to a radio frequency signal. A second frequency divider is configured to divide an input frequency by a value M. The second divider is responsive to an output of the mixer, and an output of the second frequency divider provides an input to the phase detector. Another aspect of the invention involves a method for generating at least two output frequency ranges from a phase locked loop (PLL) in a cellular phone for a mobile communications system. The PLL includes a phase detector, a loop filter, and a single voltage-controlled oscillator (VCO). An output of the VCO is multiplied by a predetermined value to produce a multiplied output, and a desired output frequency is selected. Either the output of the VCO or the multiplied output are selectively fed back to the phase detector, based upon the selected desired output frequency. When the output of the VCO is selected, the output of the VCO is fed back, and when the multiplied output is selected, the multiplied output is fed back.
A further aspect of the invention involves a dual band transmitter for a wireless phone. The dual band transmitter comprises a first power ampUfier, a second power amplifier and a phase locked loop (PLL). The first power amplifier has a first input for a first signal in a first radio frequency band, and a first output for an amplified first signal. The first output is connectable to an antenna. The second power amplifier has a second input for a second signal in a second radio frequency band and a second output for an amplified second signal. The second output is connectable to the antenna. The PLL can generate two or more output frequency ranges and comprises a first frequency divider configured to divide a frequency signal by a value N. A phase detector is responsive to an output of the first divider and a loop filter is responsive to an output of the phase detector. A voltage-controlled oscillator (VCO) is responsive to an output of the loop filter and a frequency multiplier is responsive to an output of the VCO. A band-switch has a first input responsive to the output of the VCO, a second input responsive to an output of the frequency multiplier, and a third input responsive to a control signal to select for output from the band-switch one of the first and second inputs. A mixer has two inputs, one mixer input is responsive to the output of the band-switch and a second mixer input is responsive to a radio frequency signal. A second frequency divider is configured to divide an input frequency by a value M. The second divider is responsive to an output of the mixer, and an output of the second frequency divider provides an input to the phase detector.
A further aspect of the invention involves a dual band transmitter for a wireless phone. The dual band transmitter comprises a first power amplifier, a second power amplifier and a phase locked loop (PLL). The first power amplifier has a first input for a first signal in a first radio frequency band, and a first output for an amplified first signal. The first output is connectable to an antenna. The second power amplifier has a second input for a second signal in a second radio frequency band and a second output for an amplified second signal. The second output is connectable to the antenna. The PLL can generate two or more output frequency ranges. The PLL comprises a first frequency divider configured to divide a frequency signal by a value N, a phase detector responsive to an output of the first frequency divider and a loop filter responsive to an output of the phase detector. A voltage-controlled oscillator (VCO) is responsive to an output of the loop filter, and at least one frequency multiplier is responsive to an output of the VCO. A mixer has two inputs, one mixer input is responsive to the output of the VCO and a second mixer input is responsive to a local oscillator signal. The second frequency divider is configured to divide an input frequency by a value M and connected to an output of the mixer. An output of the second divider provides an input to the phase detector, and a selector is connected to the output of the at least one frequency multiplier. The selector is configured to select an output frequency.
Another aspect of the invention involves a cellular phone for a mobile communications system. The phone is operable in a first radio frequency band and a second radio frequency band, and comprises a dual band transmitter and an antenna. The dual band transmitter comprises a phase-locked loop (PLL) which can generate two or more output frequency ranges. The PLL comprises a first frequency divider configured to divide a frequency signal by a value N, and a phase detector responsive to an output of the first frequency divider. A loop filter is responsive to an output of the phase detector and a voltage- controlled oscillator (VCO) is responsive to an output of the loop filter. At least one frequency multiplier is responsive to an output of the VCO. A mixer has two inputs, one mixer input is responsive to the output of the VCO and a second mixer input is responsive to a local oscillator signal. A second frequency divider is configured to divide an input frequency by a value M and is connected to an output of the mixer. A output of the second divider provides an input to the phase detector. A selector is connected to the output of the at least one frequency multiplier and is configured to select an output frequency.
A further aspect of the invention involves a method for generating at least two output frequency ranges from a phase locked loop (PLL) in a cellular phone for a mobile communications system. The PLL comprises a single voltage controlled oscillator (VCO), an adjustable first frequency divider which divides by a value N, a second frequency divider which divides by a value M, a phase detector, and a loop filter. The method comprises multiplying an output of the VCO by a predetermined value to produce a multiplied output frequency, selecting a desired output frequency of one of the VCO output and the multiplied output frequency, and adjusting the values of the first frequency divider such that a ratio N/M equals the value of the predetermined value when the multiplied output is selected, and adjusting the ratio N/M equal to the value "1" when the VCO output is selected.
Another aspect of the invention involves a dual band transmitter for a wireless phone. The dual band transmitter comprises a first power amplifier, a second power amplifier, and a phase locked loop (PLL). The first power amplifier has a first input for a first signal in a first radio frequency band, and a first output for an amplified first signal. The first output is connectable to an antenna. The second power amplifier has a second input for a second signal in a second radio frequency band and a second output for an amplified second signal. The second output is connectable to the antenna. The PLL can generate two or more output frequency ranges. The PLL comprises a voltage-controlled oscillator (VCO) having a first output connected to said first power amplifier. The VCO generates the first signal. A frequency multiplier has an input connected to the first output of the VCO and a second output connected to the second power amplifier. The frequency multiplier receives the first signal and generates the second signal.
A further aspect of the involves a method for generating two output frequency ranges from a phase locked loop (PLL) in a dual band transmitter for a wireless phone. The PLL comprises a single voltage controlled oscillator (VCO). The method comprises multiplying an output of the VCO by a predetermined value to produce a multiplied output frequency, and- selecting a desired output frequency of one of the VCO output and the multiplied output frequency. Another aspect of the invention involves a cellular phone for a mobile communications system. The phone is operable in a first radio frequency band and a second radio frequency band, and comprises a dual band transmitter and an antenna. The dual band transmitter includes a phase-locked loop (PLL) which can generate two or more output frequency ranges. The PLL comprises a voltage-controlled oscillator (VCO) which has a first output connected to the first power ampUfier and which generates the first signal. A frequency multiplier has an input connected to said first output of the VCO and a second output connected to said second power amplifier. The frequency multiplier receives the first signal and generates the second signal. Brief Description of the Drawings
These and other aspects, advantages, and novel features of the invention will become apparent upon reading the following detailed description and upon reference to the accompanying drawings.
Figure 1 is a schematic illustration of a cellular phone cut away to show a portion of the motherboard.
Figure 2 is a simplified illustration of a transmit path of the cellular phone shown in Figure 1.
Figure 3 is a block diagram showing a basic Phase-Locked Loop (PLL).
Figure 4 is a block diagram of a PLL frequency synthesizer utilizing a program counter in the feedback loop.
Figure 5 is a block diagram of a PLL wherein the feedback loop contains a mixer.
Figure 6 is a block diagram of a PLL according to a first embodiment of the present invention, wherein a frequency doubler and a band-switch are used to provide two different output frequency ranges. Figure 7 is a block diagram of a PLL according to a second embodiment of the present invention;
Figure 8 is a block diagram of a PLL according to a third embodiment of the present invention, wherein multiplier blocks and a selector are incorporated outside of the feedback loop; Figure 9 is a block diagram of a PLL according to a fourth embodiment of the present invention;
Figure 10 is a simplified block diagram of a dual band transmitter; and
Figure 11 is a simplified schematic a PLL including a frequency doubler circuit Detailed Description of the Preferred Embodiment A preferred embodiment of the invention is described with reference to a cellular phone for use in a mobile communications system. It is contemplated that the invention is equally applicable in other wireless devices such as conventional cordless phones for home or office use.
A mobile communications system, for example according to the GSM standard, is structured to have a variety of individual regions called cells, and to comprise a variety of fixed transceiver stations called base transceiver stations, and a plurality of mobile stations, the cellular phones. Usually, one base transceiver station defines one cell and handles telephone traffic to and from cellular phones which are currently located in the cell.
Figure 1 schematically illustrates a dual band cellular phone 3 made in accordance with the invention. A portion of the case of the dual band cellular phone 3 is cut away to show a motherboard 5 of the cellular phone 3 with a dual band transmitter 1 positioned thereon. Although not shown in Figure 1, those skilled in the art will appreciate that the cellular phone 3 comprises a plurality of other components and functional modules, such as the components of a receive path and a transmit path. The cellular phone 3 further includes an antenna 11, a display and a keypad.
The receive path of such a dual band cellular phone 3 includes a radio frequency (RF) receiver, an analog-to-digital converter, a demultiplexer and a demodulator. The transmit path comprises a multiplexer, modulator, digital-to-analog converter and an RF transmitter.
Further functional modules include, for example, a channel coder/decoder and a speech coder/decoder. Both the RF receiver and the RF transmitter are usually connected to the antenna 11 by means of a diode switch (eventually in combination with a band selector) which connects the antenna 11 either to the RF receiver or to the RF transmitter. The RF transmitter comprises an amplifier stage for amplifying the RF signals according to electrical characteristics, for example, a defined power level versus time profile and a defined spectral mask, before the RF signals are fed to the antenna 2 and emitted as radio signals. The spectral mask and the power level versus time profile are defined in GSM
Technical Specification GSM 05.05, July 1996, Version 5.2.0, entitled "Digital cellular telecommunications system (Phase 2+); Radio transmission and reception", Paragraph 4.2.2, and Annex B.
Figure 2 illustrates a simplified embodiment of the transmit path of the dual band cellular phone 3. The receive path is indicated by means of a receiver la which includes, for example, the radio frequency (RF) receiver. Within the cellular phone 3, the transmitter 1, which includes two power amplifiers, and a processing module 7 are positioned on the motherboard and interconnected between the antenna 2 and a microphone 9 of the cellular phone 3. In this simplified illustration, the processing module 7 performs most speech and signal processing in a transmit direction, for example, voice encoding and channel encoding. The dual band transmitter 1 transforms the encoded signals into the RF domain. It is contemplated that the illustrated separation into a signal processing module 7 and a dual band transmitter 1 is for illustrative purposes only. Those skilled in the art will appreciate that other separations are possible. For instance, one definition may be that a dual band transmitter only includes power amplifiers and any modulation is performed, for example, in the signal processing module 7. In the following description, the dual band transmitter 1 performs all RF processing.
The dual band transmitter modulates an RF carrier of, for example, nominal either 900 MHz or 1800 MHz with the processed speech signal. The RF signals emitted from the dual band transmitter 1 have frequencies within a transmit band of 890 MHz to 915 MHz for GSM900, and 1710 MHz to 1785 MHz for DCS1800. The dual band transmitter 1 includes a phase-locked loop (PLL) which deteπnines the transmit bands and provides for frequency stability and accuracy.
Figure 3 illustrates a standard Phase-Locked Loop (PLL). The basic PLL has an input signal having an input frequency f,n which is divided by a divider 4, wherein the divider 4 divides the input frequency fjn by a value N. The output of the divider 4 is then input into a phase detector 6. The phase detector 6 outputs a voltage that is proportional to a phase difference between two input signals (frequencies). This phase detector output voltage is then input into a loop filter 8. The loop filter 8 smoothes the phase detector output voltage and determines the loop performance based upon selected loop filter values. The output of the loop filter 8 adjusts a voltage-controlled oscillator (VCO) 10 and determines the output frequency of the VCO 10. The output of the VCO 10 is then fed back as an input to the phase detector 6 via a feedback loop 14. The output voltage of the phase detector 6 will vary according to any change in the phase difference between the output frequency of the VCO 10 and the input frequency fjn. The feedback loop 14 thus provides a means of "locking" the phase of an output frequency fj,ut in accordance with the phase of the input frequency fn. If the input frequency fjn is a highly stable reference frequency, the PLL produces a highly stable output frequency fout. The PLL produces an output frequency fout, equal to the value [fjn / N], wherein the phase of the VCO output frequency fόut follows the phase of the input frequency fjn. As illustrated in Figure 4, a divider 16 may be used in the feedback loop 14 in order to change the output frequency fout. In this case, the output frequency fout from the VCO 10 is equal to the value [(f,n * M) N]. If the divider 16 is implemented using a programmable counter, the value of M can be changed. Thus, the output frequency fout can be adjusted to a desired value by varying the value of "M".
Figure 5 illustrates an application of a PLL. A phase modulated intermediate input frequency LF is input to the first divider 4 of the PLL. The feedback loop 14 contains two additional blocks, however. A mixer 22 mixes a local oscillator signal RFLo (frequency RFLO) with a signal RFOUT (frequency RFOUT) and the output of the mixer 22 is input into a bandpass (BP) filter 24. The output of the mixer 22 may be referred to as the "feedback frequency". The feedback frequency can be selected from one of the numerous frequencies produced by a harmonic mixing within the mixer 22. In general, the output of the mixer 22 is equal to [± n*RFouτ ± m*RFLo]. If n and m are "1", then the selected outputs of the mixer 22 are either RFOUT - RFLO or RFLO - RFOUT (assuming frequency down-conversion). The bandpass filter 24 removes any unwanted mixing products produced by the mixer
22 and determines which frequency is fed-back through the M divider 16. It is contemplated that instead of the bandpass filter 24 a low-pass filter can be used. The purpose of a filter is to prevent any unwanted mixing products and the local oscillator signal RFLo from reaching the divider 16 and/or the phase detector 6. At the same time, the filter must pass the desired feedback frequency. In embodiments in which the wanted feedback frequency is lower than the local oscillator signal RFLo and other mixing products, a low-pass filter is sufficient to pass only the desired feedback frequency.
The remaining blocks operate as described in the previous figures. The PLL translates (i.e.. moves) the frequency of the input signal IF to the VCO frequency with the same phase. Thus, by adjusting the value of the local oscillator frequency RFLo, a desired output frequency RFOUT can be produced for a given intermediate frequency LF.
In the following general equations, fa is the feedback frequency output by the mixer 22, v-co is the VCO frequency, and/ϊn is the input frequency. The variables "«" and " " are integer multipliers generated by the harmonic mixing. These equations illustrate the operation of the circuit shown in Figure 5. ffi = ±n - fvco ± m - fι.o = - ffi ± — fι.o n n f M = fin I N
M_
J ft J in N
J OUT ~ J \ vco —J m Λ r ~ J LO
N n n
Assuming "n" and "m" are 1, the equation becomes
Jour = J vco ~ — J <= "~T7 '' JLO
For applications that require two different frequency bands RFOUT, such as a dual-band cellular telephone, a second PLL would normally be required to provide for the two transmit bands (890-915 MHz and 1710-1785 MHz). This would require using two separate VCOs, which adds complexity and expense to the over-all system design. An embodiment of a PLL in accordance with the present invention is shown in Figure
6. The PLL block operates generally as described in Figure 5. However, the illustrated PLL includes two additional components, a frequency doubler 28 and a band-switch 38. When the band-switch 38 is connected directly to the output of the VCO 10 (i.e. the band-switch 38 is in a position "38a"), the circuit operates as described above with reference to Figure 5. That is,
J OUT ~~ * ' J vco
J OUT ~ —J≡ A r '' J L0
N n n
When the band-switch 38 is in a position "38b", the operation of the PLL is different. Instead of the output of the VCO 10 being fed back to the mixer 22, the output of the frequency doubler 28 is fed back to the mixer 22. The frequency doubler 28 doubles the input frequency supplied by the VCO 10 and outputs a signal RF0Uti (frequency RF0Uu)- While the operation of the presently preferred embodiment is illustrated and described using a frequency doubler, the principles of the present invention may be implemented with any frequency multiplier (or divider) without departing from the teachings herein. For example, the frequency doubler 28 could actually divide the VCO output frequency by 2, or could triple the frequency supplied by the VCO 10. It should be noted that the term "multiplier" as used herein encompasses a divider, since multiplying by Vz is equivalent to dividing by 2.
This circuit is defined by the following equations, wherein H is the multiplier value.
Figure imgf000012_0001
J f OUT = + — J f 6 M A τ ± + ϋ. f L0
N n — n J 1
To preserve modulation index:
M
= 1
N - n
(Independent of H)
Notice that the modulation index is independent of the multiplier value H. Thus, by setting the values of the input frequency LF, the VCO 10, and the mixer input frequency RFLO as desired, two distinct frequency ranges may be output by the PLL, using only a single VCO 10. Another advantage to using this approach is that there is no need to adjust the N/M ratio, so that the dividers 4, 16 do not need to be programmable.
If the frequency doubler 28 is used, however, the loop gain of the PLL doubles, assuming that the M divider 16 value is kept constant. If the value of M was changed to compensate for the loop gain, the phase relationship between the input .and output frequencies would also change. Thus, there is a need to compensate for the loop gain of the circuit when the band-switch 38 is connected to the frequency doubler output. This problem may be solved by either having a loop filter 8 with a selectable gain, a phase detector 6 with a selectable gain, or by having both a loop filter 8 and a phase detector 6 with a selectable gain. A control signal line 40 is input to the band-switch 38, the phase detector 6 and/or the loop filter 8. When the control signal on the control signal line 40 places the band-switch 38 into position "38a," the gain of the phase detector 6 and/or the loop filter 8 are set to the required values for taking the output directly from the VCO 10. When the band-switch 38 is set to position "38b" by the control signal on the control signal line 40, the gain of the phase detector 6 and/or the loop filter 8 is set to the required value for taking the output from the frequency doubler 28. Thus, a single control line can be used to adjust the PLL to generate two distinct output frequency ranges using only a single VCO.
Using the GSM900/DCS1800 dual-band cellular telephone as an example, the VCO can be designed to output the frequency range 855-915 MHz. Taking the output frequency directly from the VCO provides the necessary frequency range for the GSM900 transmit band (890-915 MHz). Switching the band-switch 38 to position "38b" doubles the output frequency, and provides the frequencies of 1710-1785 MHz required for the DCS1800 transmit band.
Figure 7 illustrates a second embodiment of the present invention. In the first embodiment it is assumed that the M value is kept constant. However, the value of M may be adjusted in order to compensate for the loop gain. If M is adjusted, though, the value of N is also adjusted in order to output the desired frequency. In Figure 7, a control signal on the control signal line 41 adjusts the values of N and M, as required. Additionally, the gain of the phase detector and/or loop filter may also be adjusted if necessary (not shown). A conventional method for generating a constant envelope modulated signal is shown in Figure 5. A Phase Locked Loop (PLL) has a modulated signal LF input as the reference input to the phase detector 6. By modifying this architecture, as shown in Figure 6, a modulated signal can be generated which is equal to H * fς, wherein £ is the output frequency of the VCO. For this method to work correctly, the N/M ratio is equal to the multiplication factor "H" applied to the VCO output frequency. This design requirement keeps the modulation index (and the modulation bandwidth) equal at the input and output of the loop. Consider the following equations
1 m fjb = ±n - fvco ± m - /Lo = - fβ ± — ZLO n n fβ IM = fin I N
Figure imgf000013_0001
J OUT ~ J VCO ~~ —J in ' N , , ' n — n ' J LO f - ff f - + M ' H f + mH f
J oil ~ n ' J VCO ~ — N , r- n J in — n ' J L0
To preserve modulation index: M - H
= 1
N- n
Assuming "n" is equal to 1, the divider ratio N/M equals H in order to preserve the modulation index. In Figure 8, a third embodiment of a PLL is shown. The output of the VCO 10 is fed back to the mixer 22, and the loop operates generally as described with reference to Figure 5. The output of the VCO 10 is also input to two multiplier blocks 46, 48. The multiplier blocks 46, 48 multiply the output of the VCO 10 by the values "Hi" and "H2". For example, if the VCO 10 is adjustable over the frequency range 855 - 915 MHz, Hi can be set equal to "1" and H2 equal to "2". If the output is taken from the Hj block 46, the GSM900 band (890 - 915 MHz) can be provided. If the output is taken from the H2 block 48, the DCS1800 band (1710 - 1785 MHz) can be provided. A control signal Une 54 controls an output selector 50 in order to output a signal of the desired frequency.
The control signal line 54 also adjusts the value of N, according to which output frequency is selected, in order to keep the N/M ratio equal to the multiplier H. It is desirable to keep M constant, in order not to change the loop gain of the circuit. Therefore, it is preferable to adjust only the N value. However, it is not always possible to adjust only the N value and still cover the desired frequency ranges.
Figure 9 illustrates a fourth embodiment of the present invention. This embodiment is similar to the embodiment of Figure 8, except that the value of M is adjustable, as well as the value of N. This allows for greater flexibility in designing the circuit to cover desired output frequency ranges. If the value of M is adjusted, however, the loop gain changes. Therefore, in order to compensate for the loop gain, the gain of the phase detector 6 and/or the loop filter 8 are also adjusted. An advantage of this architecture over the prior art is that only one VCO is required to provide two (or more) frequency bands. Also, the mixer 22 in the loop always has the same input frequency range, allowing the mixer to be optimized for a given application. By controlling the divider ratio N/M so that N/M = H, the modulation of input LF can remain unchanged, when the modulation is identical for the two bands (as it is in the present case for the GSM900/DCS1800 bands). The N and M dividers can be made programmable to allow easy adjustment of the N/M ratio, and to allow multi-band operation.
Figure 10 shows a simplified block diagram of the dual band transmitter 1 shown in Figure 1. In an embodiment, the dual band transmitter 1 includes the PLL shown in Figure 6. In Figure 10, reference numeral 73 refers to the PLL in which the divider 4 divides by 2 (N = 2) and the divider 16 divides by 16 (M = 2). The dual band transmitter 1 further includes a mixer stage 71 and a power ampUfier stage 75. The PLL 73 is interposed between the mixer stage 71 and the power amplifier stage 75, wherein the PLL 73 receives an RF signal having an intermediate frequency (LF) from the mixer stage 71 and feeds an RF signal RFOUTI, RFoirrc to the power amplifier stage 75.
The power ampUfier stage 75 comprises two power amplifiers 58 , 60 connected to the antenna 11 via a band selector 64. The power amplifier 58 is optimized for signals in the 900 MHz range and receives the signal RFouπ, and the power amplifier 60 is optimized for signals in the 1800 MHz range and receives the signal RF0uτι- The power amplifier 58 may advantageously be the same as a power amplifier device RF130, and the power amplifier 60 may advantageously be the same as a power amplifier device RF230, both available from Rockwell Semiconductor Systems. Alternatively, the power amplifiers 58, 60 can be implemented in a single power ampUfier module. A controller 62 is connected to outputs 80, 82 and control inputs 84, 86 of the power amplifiers 58, 60. It is contemplated that only one of the power amplifiers 58, 60 is active at a time. The controller 62 monitors the output power level of the active power amplifier 58, 60 and generates a control signal for the active power amplifier 58, 60 so that the RF signal fed to the antenna 11 achieves and maintains, for example, a prescribed power level versus time profile as defined in the GSM standard (GSM 05.05).
The band selector 64 can be configured as a switch or diplexer which connects only one of the power amplifiers 58, 60 at a time to the antenna 11 and prevents that an RF signal from an active power amplifier 58, 60 is fed to the output 80, 82 of the inactive power amplifier 58, 60. In the illustrated embodiment of the transmitter 1, the power amplifiers 58, 60 are controlled by a single controller 62. Thus, the power ampUfiers 58, 60 share one controller 62 so that no duplication of control circuits is necessary resulting in cost savings for dual band cellular phones. By means of control signals (not shown), the controller 62 controls the power amplifiers 58 or 60. As stated above, the frequency band which the cellular phone uses to communicate with the base transceiver station is determined by external factors. An internal central controller (not shown) of the cellular phone 3 selects the RF carrier and generates a control signal depending on these external factors. The control signal controls a switch (not shown) to connect the controller 62 to the power amplifier 58 or to the power amplifier 60. As soon as the controller 62 is connected to one of the power amplifiers 58, 60, the respective power amplifier 58, 60 is activated while the other power amplifier 58, 60 remains deactive or is deactivated.
In the illustrated embodiment, the mixer stage 71 comprises an I/Q modulator formed by two mixers 68, 70 which receive differential I and Q baseband signals Txl, TxQ. The signals Txl, TxQ are low pass filtered and then applied to the mixers 68, 70 which are, for example, double balanced mixers. A phase shifter 66 shifts a signal (LO signal) from a local oscillator (not shown) by 90 degrees and feeds the local oscillator signal to the mixers 68, 70. The mixer 70 is connected to an input 76 for the I baseband signal, and the mixer 68 is connected to an input 78 for the Q baseband signal. Each mixer 68, 70 generates a modulated signal having the fundamental frequency and harmonic frequencies. An adder 72 combines the modulated signals of the mixers 68, 70 and feeds a sum signal to a band pass filter 74 which is connected to the divider 4 of the PLL. The band pass filter 74 has a pass band of about 400 MHz to block undesired frequency components, particularly the third harmonic of the fundamental frequency.
An I/Q modulator is also referred to, for example, as a quadrature modulator or as a single-side-band (SSB) modulator. For instance, such modulators are described in Simon Haykin, "Communications Systems", 2nd ed., John Wiley & Sons, 1983, pages 80-84.
Figure 11 shows an embodiment of the frequency doubler 28, for example, shown in Figure 10. The frequency doubler 28 has an input 88 and an output 90 to connect to the VCO 10 and the mixer 22, respectively. The frequency doubler 28 comprises capacitors C1-C7, inductors L1-L4, resistors Rl, R2, SL1-SL3 (strip lines) and a transistor T having a base, an emitter and a collector. The transistor T is a bipolar high frequency transistor. In one embodiment, the transistor T is a BFG505 available from Siemens. The stripline SL1 is connected to the input 88, the grounded capacitor Cl and the capacitor C2. The capacitor 2 is connected to the grounded inductor L2, the grounded resistor R2 and the base of the transistor T. In the present embodiment, the capacitors Cl and C2 have capacitances of about 5.6 pF and 4.0 pF, respectively, and the inductor L2 has an inductance of about 12 nH. The resistor R2 has a resistance of about 300 ohms. The emitter of the transistor T is connected to the grounded resistor Rl and the grounded capacitor C6. The capacitor C6 has a capacitance of about 15 pF and the resistor Rl has a resistance of about 100 ohms in the present embodiment.
The collector of the tr.ansistor T is connected to the stripline SL2 and the capacitor C5. The stripline SL2 is further connected to the grounded capacitor C3 and the inductor LI which is connected to a voltage supply VDD of about 5 volts. The capacitor C5 is further connected to the grounded inductor L4 and the inductor L3. The inductor L3 is connected to the grounded capacitor C7 and the stripline SL3 which is connected to the output 90. The inductors LI, L4 have inductances of about 10 nH each, and the inductor L3 has an inductance of about 2.7 nH. The capacitors C5 and C7 have capacities of about 1.5 pF and 1.8 pF, respectively.
The striplines SL1 and SL3 are 50-ohm lines and assist in matching the input impedance and the output impedance. The stripline SL2 has width of about 10 mils and a length of about 170 mils (1 mil = 0.001 inch = 0.0254 mm). The transistor T is a central element of the frequency doubler 28. Because of its nonlinear transfer characteristic, the transistor T generates harmonics. The circuitry connected between the collector and the output 90 is configured to pass only second harmonic and to block all other frequencies.
While the above detailed description has shown, described and identified several novel features of the invention as applied to a preferred embodiment, it will be understood that various omissions, substitutions and changes in the form and details of the described embodiments may be made by those skilled in the art without departing from the spirit of the invention. Accordingly, the scope of the invention should not be limited to the foregoing discussion, but should be defined by the appended claims.

Claims

WHAT IS CLAIMED IS:
1. A cellular phone for a mobile communications system, said phone being operable in a first radio frequency band and a second radio frequency band and comprising a dual band transmitter and an antenna, said dual band transmitter comprising a phase-locked loop (PLL) which can generate two or more output frequency ranges, the PLL comprising: a first frequency divider configured to divide a frequency signal by a value N; a phase detector responsive to an output of the first divider; a loop filter responsive to an output of the phase detector; a voltage-controlled oscillator (VCO) responsive to an output of the loop filter; a frequency multiplier responsive to an output of the VCO; a band-switch having a first input responsive to the output of the VCO, a second input responsive to an output of the frequency multiplier, and a third input responsive to a control signal to select for output from said band-switch one of the first and second inputs; a mixer having two inputs, one mixer input responsive to the output of the band-switch and a second mixer input responsive to a radio frequency signal; a second frequency divider configured to divide an input frequency by a value M, the second divider responsive to an output of the mixer, and an output of the second frequency divider providing an input to the phase detector.
2. The phone of Claim 1 , wherein the phase detector has a selectable gain and the phase detector gain is selectable by the control signal.
3. The phone of Claim 2, further comprising a control signal line connected to the band-switch and the phase detector.
4. The phone of Claim 3, wherein the loop filter has a selectable gain which is selected by the control signal on the control signal line.
5. The phone of Claim 4, wherein the phase detector has a selectable gain, and wherein the loop filter gain and the phase detector gain are selected by the control signal on the control signal line.
6. The phone of Claim 5, wherein a bandpass filter is connected between the mixer and the second divider.
7. The phone of Claim 6, wherein the frequency multiplier is a frequency doubler and the selectable gain of the loop filter or the phase detector has two settings, one corresponding to the band-switch input responsive to the output of the VCO and a second setting corresponding to the band-switch input responsive to the output of the frequency doubler.
8. The phone of Claim 7, wherein the VCO outputs a frequency range of 855 -
915 MHz.
9. The phone of Claim 1, wherein the N and M divider values are adjustable.
10. In a cellular phone for a mobile communications system, a method for generating at least two output frequency ranges from a phase locked loop (PLL) having a phase detector, a loop filter, and a single voltage-controlled oscillator (VCO), the method comprising the steps of: multiplying an output of the VCO by a predetermined value to produce a multiplied output; selecting a desired output frequency; and selectably feeding back to the phase detector one of the output of the VCO and the multiplied output, based upon the selected desired output frequency, wherein when the output of the VCO is selected, the output of the VCO is fed back, and when the multiplied output is selected, the multiplied output is fed back.
11. The method of Claim 10, further comprising the step of setting a gain of at least one of the phase detector or the loop filter according to the selected output frequency.
12. The method of Claim 11, wherein the step of multiplying further comprises multiplying the output of the VCO by a plurality of predetermined values to generate a plurality of multiplied outputs, and the step of selectably feeding back comprises feeding back to the phase detector one of the output of the VCO and one of the plurality of multiplied outputs, based upon the selected desired output frequency.
13. A dual band transmitter for a wireless phone, comprising: a first power amplifier, said first power amplifier having a first input for a first signal in a first radio frequency band, and having a first output for an amplified first signal, said first output being connectable to an antenna; a second power amplifier, said second power amplifier having a second input for a second signal in a second radio frequency band and a second output for an ampUfied second signal, said second output being connectable to said antenna; and a phase locked loop (PLL) which can generate two or more output frequency ranges,- the PLL comprising: a first frequency divider configured to divide a frequency signal by a value N; a phase detector responsive to an output of the first divider; a loop filter responsive to an output of the phase detector; a voltage-controlled oscillator (VCO) responsive to an output of the loop filter; a frequency multiplier responsive to an output of the VCO; a band-switch having a first input responsive to the output of the VCO, a second input responsive to an output of the frequency multiplier, and a third input responsive to a control signal to select for output from said band-switch one of the first and second inputs; a mixer having two inputs, one mixer input responsive to the output of the band-switch and a second mixer input responsive to a radio frequency signal; a second frequency divider configured to divide an input frequency by a value
M, the second divider responsive to an output of the mixer, and an output of the second frequency divider providing an input to the phase detector.
14. The dual band transmitter of Claim 13, wherein the phase detector has a selectable gain and the phase detector gain is selectable by the control signal.
15. The dual band transmitter of Claim 13, wherein further comprising a control signal line connected to the band-switch and the phase detector.
16. The dual band transmitter of Claim 13, wherein the loop filter has a selectable gain which is selected by the control signal on the control signal line.
17. The dual band transmitter of Claim 16, wherein the phase detector has a selectable gain, and wherein the loop filter gain and the phase detector gain are selected by the control signal on the control signal line.
18. The dual band transmitter of Claim 17, wherein a bandpass filter is connected between the mixer and the second divider.
19. The dual band transmitter of Claim 17, wherein the frequency multiplier is a frequency doubler and the selectable gain of the loop filter or the phase detector has two settings, one corresponding to the band-switch input responsive to the output of the VCO and a second setting corresponding to the band-switch input responsive to the output of the frequency doubler.
20. The dual band transmitter of Claim 19, wherein the VCO outputs a frequency range of 855 - 915 MHz.
21. The dual band transmitter of Claim 13 , wherein the N and M divider values are adjustable.
22. The dual band transmitter of Claim 15, wherein the frequency doubler comprises a combination of a mixing element and a filter, said mixing element receiving the output of the VCO and generating a signal which comprises a doubler frequency which is twice the frequency of the output of the VCO, and said filter having a characteristic to pass said doubler frequency and to block undesired frequencies.
23. A dual band transmitter for a wireless phone, comprising: a first power amplifier, said first power amplifier having a first input for a first signal in a first radio frequency band, and a first output for an amplified first signal, said first output being connectable to an antenna; a second power amplifier, said second power amplifier having a second input for a second signal in a second radio frequency band and a second output for an amplified second signal, said second output being connectable to said antenna; and a phase locked loop (PLL) which can generate two or more output frequency ranges, the PLL comprising: a first frequency divider configured to divide a frequency signal by a value N; a phase detector responsive to an output of the first frequency divider; a loop filter responsive to an output of the phase detector; a voltage-controlled oscillator (VCO) responsive to an output of the loop filter; at least one frequency multiplier responsive to an output of the VCO; a mixer having two inputs, one mixer input responsive to the output of the VCO and a second mixer input responsive to a local oscillator signal; a second frequency divider configured to divide an input frequency by a value
M and connected to an output of the mixer, an output of the second divider providing an input to the phase detector; and a selector connected to the output of the at least one frequency multiplier, the selector configured to select an output frequency.
24. The dual band transmitter of Claim 23, further comprising a control signal line connected to the selector and the first frequency divider.
25. The dual band transmitter of Claim 24, wherein the control signal line is configured to adjust the value of N such that the ratio NM equals a multiplier value associated with the selected output frequency.
26. The dual band transmitter of Claim 25, wherein the control signal line is connected to the second frequency divider, the phase detector and the loop filter; and wherein- at least one of the value of M, the gain of the phase detector and the gain of the loop filter are adjustable.
27. The dual band transmitter of Claim 23, wherein a bandpass filter is connected between the mixer and the second frequency divider.
28. The dual band transmitter of Claim 24, wherein one frequency multiplier is connected to the output of the VCO, and the selector selects between the output of the VCO and the output of the frequency multipUer.
29. The dual band transmitter of Claim 28, wherein the frequency multiplier is a frequency doubler, and the VCO outputs a frequency range of 855-915 MHz.
30. A cellular phone for a mobile communications system, said phone being operable in a first radio frequency band and a second radio frequency band, comprising a dual band transmitter and an antenna, said dual band transmitter comprising a phase-locked loop (PLL) which can generate two or more output frequency ranges, the PLL comprising: a first frequency divider configured to divide a frequency signal by a value N; a phase detector responsive to an output of the first frequency divider; a loop filter responsive to an output of the phase detector; a voltage-controlled oscillator (VCO) responsive to an output of the loop filter; at least one frequency multiplier responsive to an output of the VCO; a mixer having two inputs, one mixer input responsive to the output of the VCO and a second mixer input responsive to a local oscillator signal; a second frequency divider configured to divide an input frequency by a value M and connected to an output of the mixer, an output of the second divider providing an input to the phase detector; and a selector connected to the output of the at least one frequency multiplier, the selector configured to select an output frequency.
31. The phone of Claim 30, further comprising a control signal line connected to the selector and the first frequency divider.
32. The phone of Claim 31, wherein the control signal line is configured to adjust the value of N such that the ratio N/M equals a multiplier value associated with the selected output frequency.
33. The phone of Claim 32, wherein the control signal line is connected to the second frequency divider, the phase detector and the loop filter; and wherein at least one of the value of M, the gain of the phase detector and the gain of the loop filter is adjustable.
34. The phone of Claim 31 , wherein a bandpass filter is connected between the mixer and the second frequency divider.
35. The phone of Claim 34, wherein one frequency multiplier is connected to the output of the VCO, and the selector selects between the output of the VCO and the output of the frequency multiplier.
36. The phone of Claim 35, wherein the frequency multiplier is a frequency doubler, and the VCO outputs a frequency range of 855-915 MHz.
37. In a cellular phone for a mobile communications system, a method for generating at least two output frequency ranges from a phase locked loop (PLL) having a single voltage controlled oscillator (VCO), an adjustable first frequency divider which divides by a value N, a second frequency divider which divides by a value M, a phase detector, and a loop filter, the method comprises the steps of: multiplying an output of the VCO by a predetermined value to produce a multiplied output frequency; selecting a desired output frequency of one of the VCO output .and the multiplied output frequency; and adjusting the values of the first frequency divider such that a ratio N/M equals the value of the predetermined value when the multiplied output is selected, and adjusting the ratio N/M equal to the value "1" when the VCO output is selected.
38. The method of Claim 37, wherein the step of adjusting further comprises adjusting one of the value of M, a gain of the phase detector and a gain of the loop filter.
39. The method of Claim 38, wherein the step of multiplying further comprises multiplying the output of the VCO by a plurality of predetermined values, the step of selecting further comprises selecting one of the VCO output and the plurality of multiplied output frequencies, and the step of adjusting further comprises adjusting the ratio N/M equal the predetermined value corresponding to the selected output frequency.
40. A dual band transmitter for a wireless phone, comprising: a first power amplifier, said first power ampUfier having a first input for a first signal in a first radio frequency band, and a first output for an ampUfied first signal, said first output being connectable to an antenna; a second power amplifier, said second power amplifier having a second input for a second signal in a second radio frequency band and a second output for an ampUfied second signal, said second output being connectable to said antenna; and a phase locked loop (PLL) which can generate two or more output frequency ranges, the PLL comprising: a voltage-controlled oscillator (VCO) having a first output connected to said first power amplifier, said VCO generating said first signal; a frequency multiplier having an input connected to said first output of the VCO and a second output connected to said second power amplifier, said frequency multiplier receiving said first signal and generating said second signal.
41. The dual band transmitter of Claim 40, further comprising: a first frequency divider configured to divide a frequency signal by a value N; a mixer having two inputs, one mixer input responsive to the output of the VCO and a second mixer input responsive to a local oscillator signal; a second frequency divider configured to divide a frequency by a value M and connected to an output of the mixer, an output of the second frequency divider being connected to an input of the phase detector; a selector connected to the output of the one or more frequency multipliers for selecting an output frequency; and a control signal Une connected to the selector and the first frequency divider, wherein the control signal line adjusts the value of N such that the ratio N/M equals a multiplier value associated with the selected output frequency.
42. The dual band transmitter of Claim 41, wherein the control signal line is connected to the second frequency divider, the phase detector and the loop filter; and one of the value of M, the gain of the phase detector and the gain of the loop filter are adjustable.
43. The dual band transmitter of Claim 42, further comprising a bandpass filter connected between the mixer and the second divider.
44. The dual band transmitter of Claim 42, wherein only one frequency multiplier is connected to the output of the VCO, and the selector selects between the output of the VCO and the output of the frequency multipUer.
45. The dual band transmitter of Claim 44, wherein the frequency multiplier is a frequency doubler, and the VCO outputs a frequency range of 855-915 MHz.
46. The dual band transmitter of Claim 45, wherein the frequency doubler comprises a combination of a mixing element and a filter, said mixing element receiving the output of the VCO and generating a signal which comprises a doubler frequency which is twice the frequency of the output of the VCO, and said filter having a characteristic to pass said doubler frequency and to block undesired frequencies.
47. In a dual band transmitter for a wireless phone, a method for generating two output frequency ranges from a phase locked loop (PLL) having a single voltage controlled oscillator (VCO), the method comprising the steps of: multiplying an output of the VCO by a predetermined value to produce a multiplied output frequency; and selecting a desired output frequency of one of the VCO output and the multiplied output frequency.
48. The method of Claim 47, further comprising the steps of adjusting the values of a first divider such that a ratio N/M equals a predetermined value when the multiplied output is selected, and adjusting the ratio N/M equal to the value "1" when the VCO output is selected.
49. The method of Claim 48, wherein the step of adjusting further comprises adjusting the value of M, a gain of the phase detector and/or a gain of the loop filter are adjusted.
50. The method of Claim 48, wherein the step of multiplying further comprises multiplying the output of the VCO by a plurality of predetermined values and the step of selecting further comprises selecting the VCO output or one of the plurality of multiplied output frequencies and the step of adjusting further comprises adjusting the ratio N/M equal the predetermined value corresponding to the selected output frequency.
51. A cellular phone for a mobile communications system, said phone being operable in a first radio frequency band and a second radio frequency band, comprising a dual band transmitter and an antenna, said dual band transmitter comprising a phase-locked loop (PLL) which can generate two or more output frequency ranges, the PLL comprising: a voltage-controlled oscillator (VCO) having a first output connected to said first power amplifier, said VCO generating said first signal; and a frequency multiplier having an input connected to said first output of the VCO and a second output connected to said second power amplifier, said frequency multiplier receiving said first signal and generating said second signal.
52. The phone of Claim 51 , further comprising: a first frequency divider configured to divide a frequency by a value N; a mixer having two inputs, one mixer input connected to the output of the VCO and a second mixer input connected to local oscillator signal; a second frequency divider for dividing a frequency by a value M connected to an output of the mixer, an output of the second frequency divider being connected to an input of the phase detector; a selector connected to the output of the one or more frequency multipliers for selecting an output frequency; and a control signal line connected to the selector and the first divider wherein the control signal line adjusts the value of N such that the ratio N/M equals a multiplier value associated with the selected output frequency.
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2402273A (en) * 2003-05-30 2004-12-01 Qualcomm Providing an oscillating signal to a load
CN100492881C (en) * 2002-08-27 2009-05-27 Nxp股份有限公司 Local oscillator circuit and wireless device and communication system comprising same
WO2012130668A1 (en) * 2011-03-31 2012-10-04 Thales Low phase-noise indirect frequency synthesizer
WO2016209287A1 (en) * 2015-06-26 2016-12-29 Olympus Corporation Tuned offset phase-locked loop transmitter
CN107682007A (en) * 2017-09-22 2018-02-09 哈尔滨工业大学 The clock data recovery circuit of fast locking low jitter based on double loop

Families Citing this family (46)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6993314B2 (en) * 1998-05-29 2006-01-31 Silicon Laboratories Inc. Apparatus for generating multiple radio frequencies in communication circuitry and associated methods
US20030003887A1 (en) * 1998-05-29 2003-01-02 Lysander Lim Radio-frequency communication apparatus and associated methods
US6061551A (en) 1998-10-21 2000-05-09 Parkervision, Inc. Method and system for down-converting electromagnetic signals
US7515896B1 (en) 1998-10-21 2009-04-07 Parkervision, Inc. Method and system for down-converting an electromagnetic signal, and transforms for same, and aperture relationships
US6694128B1 (en) 1998-08-18 2004-02-17 Parkervision, Inc. Frequency synthesizer using universal frequency translation technology
US7236754B2 (en) 1999-08-23 2007-06-26 Parkervision, Inc. Method and system for frequency up-conversion
US6049706A (en) 1998-10-21 2000-04-11 Parkervision, Inc. Integrated frequency translation and selectivity
US6560301B1 (en) 1998-10-21 2003-05-06 Parkervision, Inc. Integrated frequency translation and selectivity with a variety of filter embodiments
US6061555A (en) 1998-10-21 2000-05-09 Parkervision, Inc. Method and system for ensuring reception of a communications signal
US7039372B1 (en) 1998-10-21 2006-05-02 Parkervision, Inc. Method and system for frequency up-conversion with modulation embodiments
US6542722B1 (en) 1998-10-21 2003-04-01 Parkervision, Inc. Method and system for frequency up-conversion with variety of transmitter configurations
US6370371B1 (en) 1998-10-21 2002-04-09 Parkervision, Inc. Applications of universal frequency translation
US6813485B2 (en) 1998-10-21 2004-11-02 Parkervision, Inc. Method and system for down-converting and up-converting an electromagnetic signal, and transforms for same
US6704549B1 (en) 1999-03-03 2004-03-09 Parkvision, Inc. Multi-mode, multi-band communication system
US6704558B1 (en) 1999-01-22 2004-03-09 Parkervision, Inc. Image-reject down-converter and embodiments thereof, such as the family radio service
US6879817B1 (en) 1999-04-16 2005-04-12 Parkervision, Inc. DC offset, re-radiation, and I/Q solutions using universal frequency translation technology
US6853690B1 (en) 1999-04-16 2005-02-08 Parkervision, Inc. Method, system and apparatus for balanced frequency up-conversion of a baseband signal and 4-phase receiver and transceiver embodiments
US7110444B1 (en) 1999-08-04 2006-09-19 Parkervision, Inc. Wireless local area network (WLAN) using universal frequency translation technology including multi-phase embodiments and circuit implementations
US7693230B2 (en) 1999-04-16 2010-04-06 Parkervision, Inc. Apparatus and method of differential IQ frequency up-conversion
US7065162B1 (en) 1999-04-16 2006-06-20 Parkervision, Inc. Method and system for down-converting an electromagnetic signal, and transforms for same
US8295406B1 (en) 1999-08-04 2012-10-23 Parkervision, Inc. Universal platform module for a plurality of communication protocols
US6516184B1 (en) * 1999-08-31 2003-02-04 Skyworks Solutions, Inc. Multi-band transceiver having multi-slot capability
US6731693B1 (en) * 2000-02-29 2004-05-04 Skyworks Solutions, Inc. System of and method for compensating a baseband signal to reduce third order modulation distortion
US7010286B2 (en) 2000-04-14 2006-03-07 Parkervision, Inc. Apparatus, system, and method for down-converting and up-converting electromagnetic signals
JP2002016450A (en) * 2000-06-29 2002-01-18 Tdk Corp Power amplifier module for communication equipment for moving object, terminal for communication equipment for moving object and base station for communication equipment for moving object
JP4401011B2 (en) * 2000-08-04 2010-01-20 Necエレクトロニクス株式会社 PLL circuit
US7454453B2 (en) 2000-11-14 2008-11-18 Parkervision, Inc. Methods, systems, and computer program products for parallel correlation and applications thereof
US6636086B2 (en) * 2000-12-08 2003-10-21 Agilent Technologies, Inc. High performance microwave synthesizer using multiple-modulator fractional-N divider
ATE422729T1 (en) * 2000-12-28 2009-02-15 Renesas Tech Corp PLL CIRCUIT WITH REDUCED SETTLEMENT TIME
US6993107B2 (en) * 2001-01-16 2006-01-31 International Business Machines Corporation Analog unidirectional serial link architecture
US7072427B2 (en) 2001-11-09 2006-07-04 Parkervision, Inc. Method and apparatus for reducing DC offsets in a communication system
US6714089B2 (en) * 2002-05-29 2004-03-30 Xytrans, Inc. High frequency signal source and method of generating same using dielectric resonator oscillator (DRO) circuit
US7053630B2 (en) * 2002-07-08 2006-05-30 Saab Rosemount Tank Radar Ab Level gauging system
US7460584B2 (en) 2002-07-18 2008-12-02 Parkervision, Inc. Networking methods and systems
US7379883B2 (en) 2002-07-18 2008-05-27 Parkervision, Inc. Networking methods and systems
KR100546388B1 (en) * 2003-10-17 2006-01-26 삼성전자주식회사 Multi-band transceiver of wireless communication system
JP4327666B2 (en) * 2004-06-23 2009-09-09 株式会社ルネサステクノロジ Wireless transmission circuit and transceiver using the same
US20060205375A1 (en) * 2005-03-11 2006-09-14 Nokia Corporation Measurement circuit and method for measuring the level of an RF signal, and a transmitter including a measurement circuit
DE102005056952A1 (en) * 2005-11-29 2007-06-14 Infineon Technologies Ag Circuit arrangement and method for generating local oscillator signals and phase locked loop with the circuit arrangement
US7473576B2 (en) * 2006-12-06 2009-01-06 Macronix International Co., Ltd. Method for making a self-converged void and bottom electrode for memory cell
US7999624B2 (en) * 2007-04-24 2011-08-16 City University Of Hong Kong Radiation source
US8478305B2 (en) * 2008-04-09 2013-07-02 Csr Technology Inc. System and method for integrating location information into an internet phone system
US8138841B2 (en) * 2009-08-19 2012-03-20 City University Of Hong Kong Apparatus and method for controlling the output phase of a VCO
US8704562B2 (en) * 2012-07-16 2014-04-22 Nanowave Technologies Inc. Ultra low phase noise signal source
EP2926456A4 (en) * 2012-11-29 2016-08-03 Nanowave Technologies Inc Low spurious synthesizer circuit and method
US11817871B2 (en) * 2021-01-28 2023-11-14 Anritsu Company Frequency synthesizers having low phase noise

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3854102A (en) * 1973-08-09 1974-12-10 Itt Multiple frequency band frequency synthesizer
EP0798880A2 (en) * 1996-03-29 1997-10-01 Nokia Mobile Phones Ltd. Method for generating frequencies in a direct conversion transceiver of a dual band radio communication system, a direct conversion transceiver of a dual band radio communication system and the use of this method and apparatus in a mobile station
WO1998025353A2 (en) * 1996-12-02 1998-06-11 Telefonaktiebolaget Lm Ericsson (Publ) Arrangement in a communication system
EP0944172A2 (en) * 1998-03-19 1999-09-22 Conexant Systems, Inc. Phase-locked loop for generating an output signal in two or more frequency ranges

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE793483A (en) * 1972-12-29 1973-06-29 Int Standard Electric Corp LOCKED LOOP TRANSMITTER IN PHASE.
US5903196A (en) * 1997-04-07 1999-05-11 Motorola, Inc. Self centering frequency multiplier

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3854102A (en) * 1973-08-09 1974-12-10 Itt Multiple frequency band frequency synthesizer
EP0798880A2 (en) * 1996-03-29 1997-10-01 Nokia Mobile Phones Ltd. Method for generating frequencies in a direct conversion transceiver of a dual band radio communication system, a direct conversion transceiver of a dual band radio communication system and the use of this method and apparatus in a mobile station
WO1998025353A2 (en) * 1996-12-02 1998-06-11 Telefonaktiebolaget Lm Ericsson (Publ) Arrangement in a communication system
EP0944172A2 (en) * 1998-03-19 1999-09-22 Conexant Systems, Inc. Phase-locked loop for generating an output signal in two or more frequency ranges

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100492881C (en) * 2002-08-27 2009-05-27 Nxp股份有限公司 Local oscillator circuit and wireless device and communication system comprising same
GB2402273A (en) * 2003-05-30 2004-12-01 Qualcomm Providing an oscillating signal to a load
GB2402273B (en) * 2003-05-30 2006-03-01 Qualcomm An apparatus for providing an oscillating signal to a load
US7414487B2 (en) 2003-05-30 2008-08-19 Qualcomm Incorporated Apparatus for providing an oscillating signal to a load
WO2012130668A1 (en) * 2011-03-31 2012-10-04 Thales Low phase-noise indirect frequency synthesizer
FR2973610A1 (en) * 2011-03-31 2012-10-05 Thales Sa INDIRECT SYNTHESIZER OF FREQUENCIES WITH LOW PHASE NOISE
US9077592B2 (en) 2011-03-31 2015-07-07 Thales Low phase-noise indirect frequency synthesizer
WO2016209287A1 (en) * 2015-06-26 2016-12-29 Olympus Corporation Tuned offset phase-locked loop transmitter
CN107682007A (en) * 2017-09-22 2018-02-09 哈尔滨工业大学 The clock data recovery circuit of fast locking low jitter based on double loop
CN107682007B (en) * 2017-09-22 2021-01-15 哈尔滨工业大学 Fast locking low-jitter clock data recovery circuit based on double loops

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