WO2000035082A1 - Device for amplifying signals - Google Patents

Device for amplifying signals Download PDF

Info

Publication number
WO2000035082A1
WO2000035082A1 PCT/EP1999/009205 EP9909205W WO0035082A1 WO 2000035082 A1 WO2000035082 A1 WO 2000035082A1 EP 9909205 W EP9909205 W EP 9909205W WO 0035082 A1 WO0035082 A1 WO 0035082A1
Authority
WO
WIPO (PCT)
Prior art keywords
signals
control
bridge amplifier
pulse width
control stage
Prior art date
Application number
PCT/EP1999/009205
Other languages
French (fr)
Inventor
Harry Neuteboom
Eise C. Dijkmans
Original Assignee
Koninklijke Philips Electronics N.V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics N.V. filed Critical Koninklijke Philips Electronics N.V.
Priority to JP2000587436A priority Critical patent/JP2002532933A/en
Priority to EP99962169A priority patent/EP1053591A1/en
Publication of WO2000035082A1 publication Critical patent/WO2000035082A1/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217Class D power amplifiers; Switching amplifiers
    • H03F3/2173Class D power amplifiers; Switching amplifiers of the bridge type

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

The device for amplifying input signals (10) comprises a control stage (12) and a switching bridge amplifier (14), which is coupled to said control stage via at least first and second control signals (16, 18). The bridge amplifier (14) can be switched in at least two states, in dependence upon the control signals (16, 18). The control stage (12) is embodied so as to control only a single substantially passive state of the bridge amplifier (14), as a result of which relatively small switching losses occur.

Description

Device for amplifying signals
The invention relates to a device for amplifying input signals, comprising a control stage and a switching bridge amplifier, which is coupled to said control stage via at least first and second control signals, the bridge amplifier being switchable in at least two states in dependence upon the control signals. The invention also relates to an audio system and a hearing aid provided with such a device.
Such a device is disclosed in US-A 5 387 875. In audio systems and hearing aids, such devices are often used to amplify audio signals. The device known from said United States patent document comprises an oscillator for generating a triangular reference signal, and first and second comparators for generating, respectively, a first and a second control signal. An input signal to be amplified is converted to the first control signal in the first comparator by comparing the input signal with the reference signal. Similarly, the input signal inverted by an inverter is converted to the second control signal in the second comparator by comparing the inverted input signal with the reference signal. Subsequently, the input signal is amplified by supplying the control signals to a switching bridge amplifier composed of four switches.
The switching bridge amplifier incorporated in the known device may be in four different states. These states are diagrammatically shown in Figs. 2A through 2D. The Figs. 2A and 2B show two active states of the bridge amplifier, wherein the bridge amplifier supplies power to a load 48. The Figs. 2C and 2D show two passive states of the bridge amplifier, wherein the bridge amplifier does not supply power to the load 48. In the known device, all four states of the switching bridge amplifier are controlled by the control stage.
In the known device, relatively much power is dissipated in the bridge amplifier.
It is an object of the invention to provide a device of the type mentioned in the opening paragraph, in which relatively little power is dissipated in the bridge amplifier.
To achieve this, the device in accordance with the invention is characterized in that the control stage is embodied so as to control only a single substantially passive state of the bridge amplifier. In the known device, both passive states of the switching bridge amplifier, as shown in Figs. 2C and 2D, are controlled by the control stage. The invention is based on the recognition that the relatively high power dissipation in the known device is caused by the large number of switching operations performed by the switches in the bridge amplifier. The switching operation performed by a switch causes a small amount of power to be dissipated in the switch. These so-called switching losses are reduced in the device in accordance with the invention by controlling the bridge amplifier in such a manner that it can only be in one of the two passive states. The other passive state is not controlled. As a result, the switches in the bridge amplifier have to perform fewer switching operations, so that less power is dissipated.
An embodiment of the device in accordance with the invention is characterized in that the control stage comprises a conversion unit for converting the input signals into sign and magnitude-coded signals, said control stage also comprising a pulse width modulator for converting the magnitude of the coded signals to pulse width-modulated signals, and the control stage further comprising a generator for generating the control signals from the pulse width-modulated signals and the sign of the coded signals. It has been found that the control signals can be readily generated in this manner.
A further embodiment of the device in accordance with the invention is characterized in that the pulse width-modulated signals comprise at least bivalent signals, the generator being embodied so as to control the passive state of the bridge amplifier when the pulse width-modulated signals have a substantially low value. By virtue thereof, a simple implementation of the generator is achieved.
These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.
In the drawings:
Fig. 1 shows a diagram of an example of a device in accordance with the invention.
Figs. 2A through 2D show a number of states of a switching bridge amplifier by means of which the operation of the device in accordance with the invention will be explained. In the Figures, like reference numerals refer to like parts.
Fig. 1 diagrammatically shows an example of a device in accordance with the invention. The device comprises a control stage 12 and a switching bridge amplifier 14, which is coupled to said control stage via a first control signal 16 and a second control signal 18. An input signal 10 to be amplified is converted by the control stage 12 to the first and the second control signals 16 and 18. By controlling the bridge amplifier 14 by these control signals 16 and 18, an input signal amplified by the device is obtained between two outputs 44 and 46. The input signal 10 may be, for example, an audio signal which, after it has been amplified, can be converted into sound by a loudspeaker 48 arranged between the outputs 44 and 46. The control stage 12 comprises a conversion unit 20, a pulse width modulator
26 and a generator 27. In the conversion unit 20, the input signal 10 is converted to a sign and magnitude-coded signal, whereafter the sign 22 and the magnitude 24 of the coded signal are separated from each other. The magnitude 24 of the coded signal is subsequently converted to a pulse width-modulated signal 28 in the pulse width modulator 26. In the generator 27, the control signals 16 and 18 are generated from the pulse width-modulated signal 28 and the sign 22 of the coded signals.
The generator 27 comprises first and second NAND gates 32 and 34, and an inverter 30. By presenting the pulse width-modulated signal 28 and the sign 22 of the coded signals at the inputs of the first NAND gate 32, the first control signal 16 is formed at an output of the first NAND gate 32. The second control signal 18 is formed at an output of the second NAND gate 32 by presenting, at the inputs of the second NAND gate 34, the pulse width-modulated signal 28 and the sign 22 of the coded signals, which is inverted by the inverter 30.
The switching bridge amplifier 14 comprises four field effect transistors 36, 38, 40 and 42. Here, these transistors function as switching elements. The transistors 36 and 40 are so-called n-channel field effect transistors, and the transistors 38 and 42 are so-called p- channel field effect transistors. The sources of the transistors 36 and 40 are connected to a relatively high supply voltage V+. The sources of the transistors 38 and 42 are connected to a relatively low supply voltage V". The drains of the transistors 36 and 38 are connected to each other and to the output 44. The drains of the transistors 40 and 42 are connected to each other and to the output 46. The gates of the transistors 36 and 38 are connected to the first control signal 16. The gates of the transistors 40 and 42 are connected to the second control signal 18. If the first control signal 16 has a logic 1 value, then the transistor 36 is turned on, i.e., there is no conduction between the drain and the source of this transistor, while the transistor 38 is turned off, i.e., the drain and the source of this transistor are conductively interconnected. If the second control signal 18 has a logic 1 value, then the transistor 40 is turned on, i.e. there is no conduction between the drain and the source of this transistor, while the transistor 42 is turned off, i.e.. the drain and the source of this transistor are conductively interconnected. At these values of the control signals 16 and 18, the bridge amplifier 14 is in the state shown in Fig. 2C. Analogous thereto, the bridge amplifier 14 is in the state shown in Fig. 2D if the control signals 16 and 18 both have a logic 0 value. The bridge amplifier 14 is in the state shown in Fig. 2A if the first control signal 16 has a logic 0 value, while the second control signal 18 has a logic 1 value. Finally, the bridge amplifier 14 is in the state shown in Fig. 2B if the first control signal 16 has a logic 1 value while the second control signal 18 had a logic 0 value.
The construction of the control stage 12 shown in Fig. 1 causes the switching bridge amplifier 14 to be controlled by the control stage in such a manner that, in the case of a positive input signal 10, the bridge amplifier 14 is alternately in the states shown in Figs. 2B and 2C, while in the case of a negative input signal 10, the bridge amplifier 14 is alternately in the states shown in Figs. 2A and 2C. If the input signal 10 is zero, then the bridge amplifier 14 is in the passive state shown in Fig. 2C. At none of the values of the input signal 10, the bridge amplifier is in the passive state shown in Fig. 2D.
It will be obvious to those skilled in the art that the construction of the generator 27, as shown in Fig. 1, is only one of a large number of possible constructions.
Firstly, the logic function obtained by means of AND gates can also be obtained by means of OR gates. In addition, it is possible to embody the generator 27 in such a way that the control signals 16 and 18 are exchanged. Finally, it is also possible to control the bridge amplifier 14 in such a manner that, instead of the passive state shown in Fig. 2C, the passive state shown in Fig. 2D is employed.
The device shown in Fig. 1 can particularly suitably be used in audio systems and hearing aids.
In the Figs. 2A through 2D, a number of states of the switching bridge amplifier 14 are shown. In Fig. 2A, a first active state of the bridge amplifier 14 is shown. Here, the switches 36 and 42 are turned off, and the switches 38 and 40 are turned on. As a result thereof, a current +i flows through a load 48 provided between the outputs 44 and 46. In Fig. 2B, a second active state of the bridge amplifier 14 is shown, wherein the switches 36 and 42 are turned on and the switches 38 and 40 are turned off. As a result, a current -i flows through the load 48. In Fig. 2C, a first passive state of the bridge amplifier 14 is shown. In this state, the switches 36 and 40 are turned on and the switches 38 and 42 are turned off. As a result, the outputs 44 and 46 are both connected to the relatively low supply voltage V", so that no current flows through the load 48. Finally, in Fig. 2D, a second passive state of the bridge amplifier 14 is shown, wherein the switches 36 and 40 are turned off and the switches 38 and 42 are turned on. As a result, the outputs 44 and 46 are both connected to the relatively high supply voltage V+, so that, also in this state, no current flows through the load 48. In the device in accordance with the invention, the switching bridge amplifier 14 is controlled in such a manner that only one of the passive states shown in Figs. 2C and 2D occurs.

Claims

1. A device for amplifying input signals (10), comprising a control stage (12) and a switching bridge amplifier (14), which is coupled to said control stage via at least first and second control signals (16, 18), the bridge amplifier (14) being switchable in at least two states in dependence upon the control signals (16, 18), characterized in that the control stage (12) is embodied so as to control only a single substantially passive state of the bridge amplifier (14).
2. A device as claimed in claim 1, characterized in that the control stage (12) comprises a conversion unit (20) for converting the input signals (10) into sign and magnitude- coded signals, said control stage also comprising a pulse width modulator (26) for converting the magnitude (24) of the coded signals to pulse width-modulated signals (28), and the control stage (12) further comprising a generator (27) for generating the control signals (16, 18) from the pulse width-modulated signals (28) and the sign (22) of the coded signals.
3. A device as claimed in claim 2, characterized in that the pulse width-modulated signals (28) comprise at least bivalent signals, the generator (27) being embodied so as to control the passive state of the bridge amplifier (14) when the pulse width-modulated signals (28) have a substantially low value.
4. An audio system provided with a device for amplifying signals in accordance with any one of the preceding claims.
5. A hearing aid provided with a device for amplifying signals as claimed in any one of the claims 1 through 3.
PCT/EP1999/009205 1998-12-08 1999-11-24 Device for amplifying signals WO2000035082A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2000587436A JP2002532933A (en) 1998-12-08 1999-11-24 Device to amplify signal
EP99962169A EP1053591A1 (en) 1998-12-08 1999-11-24 Device for amplifying signals

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP98204174.1 1998-12-08
EP98204174 1998-12-08

Publications (1)

Publication Number Publication Date
WO2000035082A1 true WO2000035082A1 (en) 2000-06-15

Family

ID=8234450

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP1999/009205 WO2000035082A1 (en) 1998-12-08 1999-11-24 Device for amplifying signals

Country Status (4)

Country Link
US (1) US6313697B1 (en)
EP (1) EP1053591A1 (en)
JP (1) JP2002532933A (en)
WO (1) WO2000035082A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001003303A2 (en) * 1999-07-01 2001-01-11 Broadcom Corporation Method and apparatus for efficient mixed signal processing in a digital amplifier
CN105252791A (en) * 2015-11-30 2016-01-20 江苏恒神股份有限公司 Novel adhesive injection device

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6597240B1 (en) * 2001-04-02 2003-07-22 Cirrus Logic, Inc. Circuits and methods for slew rate control and current limiting in switch-mode systems
US6552607B1 (en) * 2001-11-12 2003-04-22 Apogee Technology Inc. Time division multiplexed PWM amplifier
EP1447907B1 (en) * 2003-02-17 2007-11-07 D&M Holdings, Inc. Pulse width modulation amplifier
JP3863133B2 (en) * 2003-09-25 2006-12-27 沖電気工業株式会社 Signal amplification circuit
US8995691B2 (en) 2008-07-14 2015-03-31 Audera Acoustics Inc. Audio amplifier
DE102010047129A1 (en) * 2010-09-30 2012-04-05 Infineon Technologies Ag Method for controlling loudspeakers, involves controlling signals output from left and right channels, at individual speaker terminals of loudspeakers

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5387875A (en) * 1993-01-29 1995-02-07 Rion Kabushiki Kaisha Output circuit capable of driving a vibration device
US5442317A (en) * 1992-11-10 1995-08-15 Motorola, Inc. Switching regulator and amplifier system
US5506493A (en) * 1992-11-10 1996-04-09 Motorola, Inc. Switching regulator and amplifier system

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3931581A (en) * 1974-09-30 1976-01-06 The United States Of America As Represented By The Secretary Of The Navy High-efficiency, switching, power amplifier
US5075634A (en) * 1990-11-23 1991-12-24 Blade Technologies Inc. Composite bridge amplifier
US5617058A (en) * 1995-11-13 1997-04-01 Apogee Technology, Inc. Digital signal processing for linearization of small input signals to a tri-state power switch
US6097249A (en) * 1998-09-02 2000-08-01 Rockford Corporation Method and device for improved class BD amplification having single-terminal alternating-rail dual-sampling topology

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5442317A (en) * 1992-11-10 1995-08-15 Motorola, Inc. Switching regulator and amplifier system
US5506493A (en) * 1992-11-10 1996-04-09 Motorola, Inc. Switching regulator and amplifier system
US5387875A (en) * 1993-01-29 1995-02-07 Rion Kabushiki Kaisha Output circuit capable of driving a vibration device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001003303A2 (en) * 1999-07-01 2001-01-11 Broadcom Corporation Method and apparatus for efficient mixed signal processing in a digital amplifier
WO2001003303A3 (en) * 1999-07-01 2002-01-10 Broadcom Corp Method and apparatus for efficient mixed signal processing in a digital amplifier
US6765518B2 (en) 1999-07-01 2004-07-20 Broadcom Corporation Method and apparatus for efficient mixed signal processing in a digital amplifier
US6791404B1 (en) 1999-07-01 2004-09-14 Broadcom Corporation Method and apparatus for efficient mixed signal processing in a digital amplifier
US6864815B2 (en) 1999-07-01 2005-03-08 Broadcom Corporation Method and apparatus for efficient mixed signal processing in a digital amplifier
US6933778B2 (en) 1999-07-01 2005-08-23 Broadcom Corporation Method and apparatus for efficient mixed signal processing in a digital amplifier
US6933870B2 (en) 1999-07-01 2005-08-23 Broadcom Corporation Method and apparatus for efficient mixed signal processing in a digital amplifier
CN105252791A (en) * 2015-11-30 2016-01-20 江苏恒神股份有限公司 Novel adhesive injection device

Also Published As

Publication number Publication date
US6313697B1 (en) 2001-11-06
EP1053591A1 (en) 2000-11-22
JP2002532933A (en) 2002-10-02

Similar Documents

Publication Publication Date Title
EP0330628A2 (en) High side driver MOS circuit
JP2010213114A (en) Class d amplifier circuit
US6313697B1 (en) Device for amplifying signals
US6480050B1 (en) Level shifter with no quiescent DC current flow
US20130106493A1 (en) Switching system and method for control thereof
US6633191B2 (en) Clock buffer with DC offset suppression
EP0896421A3 (en) Output circuit for a PWM inverter
US7102416B2 (en) High side switching circuit
US6130569A (en) Method and apparatus for a controlled transition rate driver
KR100824129B1 (en) Amplifier
MY112446A (en) Bicmos ecl-cmos level converter
JPH0318119A (en) Complementary type metallic-oxide semiconductor translator
US6967530B2 (en) Circuit and semiconductor device for reducing the generation of shock noise of a power amplifier outputting amplified audio signals
CN113796012A (en) Low power current steering digital-to-analog converter
JP2004056254A (en) Power amplifier
JP2004135016A (en) Output muting circuit of audio equipment
US6049226A (en) Level converter
US20040027196A1 (en) Electronic circuit for converting a signal and amplifier incorporating same
US5532622A (en) Multi-input transition detector with a single delay
JPH06152268A (en) Switching amplifier
JPH0210661Y2 (en)
JPH0834425B2 (en) Switching controller
JPH06216739A (en) Gate drive circuit
GB2589183A (en) Voltage control
US7619471B2 (en) Class D amplifier with increased efficiency

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): JP

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE

WWE Wipo information: entry into national phase

Ref document number: 1999962169

Country of ref document: EP

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWP Wipo information: published in national office

Ref document number: 1999962169

Country of ref document: EP

WWW Wipo information: withdrawn in national office

Ref document number: 1999962169

Country of ref document: EP