WO2000070654A3 - Niederohmiges vdmos-halbleiterbauelement - Google Patents

Niederohmiges vdmos-halbleiterbauelement Download PDF

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Publication number
WO2000070654A3
WO2000070654A3 PCT/DE2000/001155 DE0001155W WO0070654A3 WO 2000070654 A3 WO2000070654 A3 WO 2000070654A3 DE 0001155 W DE0001155 W DE 0001155W WO 0070654 A3 WO0070654 A3 WO 0070654A3
Authority
WO
WIPO (PCT)
Prior art keywords
low
semiconductor component
resistance
vdmos semiconductor
resistance vdmos
Prior art date
Application number
PCT/DE2000/001155
Other languages
English (en)
French (fr)
Other versions
WO2000070654A2 (de
Inventor
Jenoe Tihanyi
Wolfgang Werner
Original Assignee
Infineon Technologies Ag
Jenoe Tihanyi
Wolfgang Werner
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Jenoe Tihanyi, Wolfgang Werner filed Critical Infineon Technologies Ag
Priority to EP00934909A priority Critical patent/EP1181712B1/de
Priority to DE50014007T priority patent/DE50014007D1/de
Priority to JP2000619010A priority patent/JP2003500826A/ja
Publication of WO2000070654A2 publication Critical patent/WO2000070654A2/de
Publication of WO2000070654A3 publication Critical patent/WO2000070654A3/de
Priority to US10/011,131 priority patent/US6534830B2/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H01L29/0623—Buried supplementary region, e.g. buried guard ring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063—Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0873—Drain regions
    • H01L29/0878—Impurity concentration or distribution
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41766—Source or drain electrodes for field effect devices with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor

Abstract

Die Erfindung betrifft ein niederohmiges VDMOS-Halbleiterbauelement und insbesondere einen VDMOS-Transistor oder einen vertikalen IGBT mit planarer Gatestruktur, bei dem im Bereich des Bodens (26) eines Grabens (6) ein diesen Bereich umgebendes Gebiet (27) des anderen Leitungstyps vorgesehen ist und der Graben (6) wenigstens teilweise mit Isoliermaterial (31) gefüllt ist.
PCT/DE2000/001155 1999-05-12 2000-04-13 Niederohmiges vdmos-halbleiterbauelement WO2000070654A2 (de)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP00934909A EP1181712B1 (de) 1999-05-12 2000-04-13 Niederohmiges vdmos-halbleiterbauelement
DE50014007T DE50014007D1 (de) 1999-05-12 2000-04-13 Niederohmiges vdmos-halbleiterbauelement
JP2000619010A JP2003500826A (ja) 1999-05-12 2000-04-13 低インピーダンスｖｄｍｏｓ半導体素子
US10/011,131 US6534830B2 (en) 1999-05-12 2001-11-13 Low impedance VDMOS semiconductor component

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19922187A DE19922187C2 (de) 1999-05-12 1999-05-12 Niederohmiges VDMOS-Halbleiterbauelement und Verfahren zu dessen Herstellung
DE19922187.1 1999-05-12

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US10/011,131 Continuation US6534830B2 (en) 1999-05-12 2001-11-13 Low impedance VDMOS semiconductor component

Publications (2)

Publication Number Publication Date
WO2000070654A2 WO2000070654A2 (de) 2000-11-23
WO2000070654A3 true WO2000070654A3 (de) 2001-07-19

Family

ID=7908027

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2000/001155 WO2000070654A2 (de) 1999-05-12 2000-04-13 Niederohmiges vdmos-halbleiterbauelement

Country Status (6)

Country Link
US (1) US6534830B2 (de)
EP (1) EP1181712B1 (de)
JP (1) JP2003500826A (de)
AT (1) ATE352873T1 (de)
DE (2) DE19922187C2 (de)
WO (1) WO2000070654A2 (de)

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US6656797B2 (en) * 2001-12-31 2003-12-02 General Semiconductor, Inc. High voltage power MOSFET having a voltage sustaining region that includes doped columns formed by trench etching and ion implantation
JP3652322B2 (ja) * 2002-04-30 2005-05-25 Ｎｅｃエレクトロニクス株式会社 縦型ｍｏｓｆｅｔとその製造方法
KR100767078B1 (ko) * 2003-10-08 2007-10-15 도요다 지도샤 가부시끼가이샤 절연 게이트형 반도체 장치 및 그 제조 방법
GB0326030D0 (en) * 2003-11-06 2003-12-10 Koninkl Philips Electronics Nv Insulated gate field effect transistor
US7535056B2 (en) * 2004-03-11 2009-05-19 Yokogawa Electric Corporation Semiconductor device having a low concentration layer formed outside a drift layer
JP4491307B2 (ja) * 2004-09-21 2010-06-30 トヨタ自動車株式会社 半導体装置およびその製造方法
DE102006036347B4 (de) * 2006-08-03 2012-01-12 Infineon Technologies Austria Ag Halbleiterbauelement mit einer platzsparenden Randstruktur
US9252251B2 (en) 2006-08-03 2016-02-02 Infineon Technologies Austria Ag Semiconductor component with a space saving edge structure
JP2009094203A (ja) * 2007-10-05 2009-04-30 Denso Corp 炭化珪素半導体装置
US20110198689A1 (en) * 2010-02-17 2011-08-18 Suku Kim Semiconductor devices containing trench mosfets with superjunctions
US9716167B2 (en) * 2011-02-22 2017-07-25 National Semiconductor Corporation Trench DMOS transistor with reduced gate-to-drain capacitance
TWI587503B (zh) * 2012-01-11 2017-06-11 世界先進積體電路股份有限公司 半導體裝置及其製造方法
US9070765B2 (en) 2013-02-06 2015-06-30 Infineon Technologies Ag Semiconductor device with low on resistance and high breakdown voltage
US20140374882A1 (en) * 2013-06-21 2014-12-25 Infineon Technologies Austria Ag Semiconductor Device with Recombination Centers and Method of Manufacturing
US20150118810A1 (en) * 2013-10-24 2015-04-30 Madhur Bobde Buried field ring field effect transistor (buf-fet) integrated with cells implanted with hole supply path
CN106158961B (zh) * 2015-04-17 2019-10-15 北大方正集团有限公司 平面型vdmos器件制作方法
CN105489500B (zh) * 2015-12-30 2018-08-07 西安龙腾新能源科技发展有限公司 超结vdmos的制备方法及其超结vdmos器件
CN111146288A (zh) * 2018-11-06 2020-05-12 无锡华润上华科技有限公司 一种半导体器件及其制造方法
CN113327976A (zh) * 2021-05-08 2021-08-31 深圳市威兆半导体有限公司 超结功率mosfet的制备方法

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Also Published As

Publication number Publication date
US6534830B2 (en) 2003-03-18
US20020079535A1 (en) 2002-06-27
EP1181712B1 (de) 2007-01-24
JP2003500826A (ja) 2003-01-07
EP1181712A2 (de) 2002-02-27
DE19922187C2 (de) 2001-04-26
WO2000070654A2 (de) 2000-11-23
DE19922187A1 (de) 2000-11-23
DE50014007D1 (de) 2007-03-15
ATE352873T1 (de) 2007-02-15

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