WO2000077820A3 - Operating system page placement to maximize cache data reuse - Google Patents
Operating system page placement to maximize cache data reuse Download PDFInfo
- Publication number
- WO2000077820A3 WO2000077820A3 PCT/US2000/014851 US0014851W WO0077820A3 WO 2000077820 A3 WO2000077820 A3 WO 2000077820A3 US 0014851 W US0014851 W US 0014851W WO 0077820 A3 WO0077820 A3 WO 0077820A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- pages
- operating system
- hot
- conflict
- memory
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
- G06F12/121—Replacement control using replacement algorithms
- G06F12/126—Replacement control using replacement algorithms with special data handling, e.g. priority of data or instructions, handling errors or pinning
Abstract
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE60001170T DE60001170T2 (en) | 1999-06-15 | 2000-05-30 | OPERATING SYSTEM PAGE LOCATION TO MAXIMIZE CACHE DATA REUSE |
AT00937935T ATE230860T1 (en) | 1999-06-15 | 2000-05-30 | OPERATING SYSTEM PAGE PLACEMENT TO MAXIMIZE CACHE DATA REUSE |
AU53047/00A AU5304700A (en) | 1999-06-15 | 2000-05-30 | Operating system page placement to maximize cache data reuse |
EP00937935A EP1190438B1 (en) | 1999-06-15 | 2000-05-30 | Operating system page placement to maximize cache data reuse |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/333,418 | 1999-06-15 | ||
US09/333,418 US6408368B1 (en) | 1999-06-15 | 1999-06-15 | Operating system page placement to maximize cache data reuse |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2000077820A2 WO2000077820A2 (en) | 2000-12-21 |
WO2000077820A3 true WO2000077820A3 (en) | 2001-06-28 |
Family
ID=23302686
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2000/014851 WO2000077820A2 (en) | 1999-06-15 | 2000-05-30 | Operating system page placement to maximize cache data reuse |
Country Status (6)
Country | Link |
---|---|
US (1) | US6408368B1 (en) |
EP (1) | EP1190438B1 (en) |
AT (1) | ATE230860T1 (en) |
AU (1) | AU5304700A (en) |
DE (1) | DE60001170T2 (en) |
WO (1) | WO2000077820A2 (en) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001109661A (en) * | 1999-10-14 | 2001-04-20 | Hitachi Ltd | Assigning method for cache memory, operating system and computer system having the operating system |
US7111141B2 (en) * | 2000-10-17 | 2006-09-19 | Igt | Dynamic NV-RAM |
US8550922B2 (en) | 2006-03-03 | 2013-10-08 | Igt | Game removal with game history |
EP1470476A4 (en) * | 2002-01-31 | 2007-05-30 | Arc Int | Configurable data processor with multi-length instruction set architecture |
US6996676B2 (en) * | 2002-11-14 | 2006-02-07 | International Business Machines Corporation | System and method for implementing an adaptive replacement cache policy |
US6952760B2 (en) * | 2003-05-21 | 2005-10-04 | Sun Microsystems, Inc. | Methods and systems for memory allocation |
US7165147B2 (en) * | 2003-07-22 | 2007-01-16 | International Business Machines Corporation | Isolated ordered regions (IOR) prefetching and page replacement |
US20050091224A1 (en) * | 2003-10-22 | 2005-04-28 | Fisher James A. | Collaborative web based development interface |
US7418582B1 (en) | 2004-05-13 | 2008-08-26 | Sun Microsystems, Inc. | Versatile register file design for a multi-threaded processor utilizing different modes and register windows |
US7543132B1 (en) | 2004-06-30 | 2009-06-02 | Sun Microsystems, Inc. | Optimizing hardware TLB reload performance in a highly-threaded processor with multiple page sizes |
US7290116B1 (en) | 2004-06-30 | 2007-10-30 | Sun Microsystems, Inc. | Level 2 cache index hashing to avoid hot spots |
US7509484B1 (en) | 2004-06-30 | 2009-03-24 | Sun Microsystems, Inc. | Handling cache misses by selectively flushing the pipeline |
US7571284B1 (en) | 2004-06-30 | 2009-08-04 | Sun Microsystems, Inc. | Out-of-order memory transactions in a fine-grain multithreaded/multi-core processor |
US20060129740A1 (en) * | 2004-12-13 | 2006-06-15 | Hermann Ruckerbauer | Memory device, memory controller and method for operating the same |
US7487320B2 (en) * | 2004-12-15 | 2009-02-03 | International Business Machines Corporation | Apparatus and system for dynamically allocating main memory among a plurality of applications |
US7951008B2 (en) * | 2006-03-03 | 2011-05-31 | Igt | Non-volatile memory management technique implemented in a gaming machine |
US20080189495A1 (en) * | 2007-02-02 | 2008-08-07 | Mcbrearty Gerald Francis | Method for reestablishing hotness of pages |
US7747820B2 (en) * | 2007-06-15 | 2010-06-29 | Microsoft Corporation | Managing working set use of a cache via page coloring |
US20150052326A1 (en) * | 2013-08-19 | 2015-02-19 | International Business Machines Corporation | User-controlled paging |
CN109857681B (en) | 2017-11-30 | 2023-07-18 | 华为技术有限公司 | Cache address mapping method and related equipment |
US20190034337A1 (en) * | 2017-12-28 | 2019-01-31 | Intel Corporation | Multi-level system memory configurations to operate higher priority users out of a faster memory level |
US11764940B2 (en) | 2019-01-10 | 2023-09-19 | Duality Technologies, Inc. | Secure search of secret data in a semi-trusted environment using homomorphic encryption |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1983000758A1 (en) * | 1981-08-18 | 1983-03-03 | Schkolnick, Mario | Thrashing reduction in demand accessing of a data base through an lru paging buffer pool |
EP0568221A1 (en) * | 1992-04-29 | 1993-11-03 | Sun Microsystems, Inc. | Methods and apparatus for implementing a pseudo-LRU cache memory replacement scheme with a locking feature |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5261088A (en) | 1990-04-26 | 1993-11-09 | International Business Machines Corporation | Managing locality in space reuse in a shadow written B-tree via interior node free space list |
US5404482A (en) * | 1990-06-29 | 1995-04-04 | Digital Equipment Corporation | Processor and method for preventing access to a locked memory block by recording a lock in a content addressable memory with outstanding cache fills |
TW219986B (en) | 1991-06-17 | 1994-02-01 | Digital Equipment Corp | |
US5630097A (en) | 1991-06-17 | 1997-05-13 | Digital Equipment Corporation | Enhanced cache operation with remapping of pages for optimizing data relocation from addresses causing cache misses |
JPH06511582A (en) | 1992-07-24 | 1994-12-22 | マイクロソフト コーポレイション | Computer method and system for allocating and freeing memory |
US5974508A (en) * | 1992-07-31 | 1999-10-26 | Fujitsu Limited | Cache memory system and method for automatically locking cache entries to prevent selected memory items from being replaced |
US5623654A (en) | 1994-08-31 | 1997-04-22 | Texas Instruments Incorporated | Fast fragmentation free memory manager using multiple free block size access table for a free list |
US5897660A (en) | 1995-04-07 | 1999-04-27 | Intel Corporation | Method for managing free physical pages that reduces trashing to improve system performance |
US5787447A (en) | 1995-05-08 | 1998-07-28 | Sun Microsystems, Inc. | Memory allocation maintaining ordering across multiple heaps |
US6026475A (en) | 1997-11-26 | 2000-02-15 | Digital Equipment Corporation | Method for dynamically remapping a virtual address to a physical address to maintain an even distribution of cache page addresses in a virtual address space |
-
1999
- 1999-06-15 US US09/333,418 patent/US6408368B1/en not_active Expired - Lifetime
-
2000
- 2000-05-30 AU AU53047/00A patent/AU5304700A/en not_active Abandoned
- 2000-05-30 DE DE60001170T patent/DE60001170T2/en not_active Expired - Fee Related
- 2000-05-30 AT AT00937935T patent/ATE230860T1/en not_active IP Right Cessation
- 2000-05-30 EP EP00937935A patent/EP1190438B1/en not_active Expired - Lifetime
- 2000-05-30 WO PCT/US2000/014851 patent/WO2000077820A2/en active IP Right Grant
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1983000758A1 (en) * | 1981-08-18 | 1983-03-03 | Schkolnick, Mario | Thrashing reduction in demand accessing of a data base through an lru paging buffer pool |
EP0568221A1 (en) * | 1992-04-29 | 1993-11-03 | Sun Microsystems, Inc. | Methods and apparatus for implementing a pseudo-LRU cache memory replacement scheme with a locking feature |
Non-Patent Citations (1)
Title |
---|
DONG R. K., GILDEA M. C., SITLER W. R.: "LEAST RECENTLY USED APPARATUS ALTERATION TO MAINTAIN RETRIABLE DATA IN A MULTIPROCESSOR SYSTEM", IBM TECHNICAL DISCLOSURE BULLETIN, vol. 27, no. 9, 1 February 1985 (1985-02-01), New York, US, pages 5339, XP002147071 * |
Also Published As
Publication number | Publication date |
---|---|
US6408368B1 (en) | 2002-06-18 |
ATE230860T1 (en) | 2003-01-15 |
AU5304700A (en) | 2001-01-02 |
WO2000077820A2 (en) | 2000-12-21 |
EP1190438A2 (en) | 2002-03-27 |
DE60001170D1 (en) | 2003-02-13 |
DE60001170T2 (en) | 2003-07-31 |
EP1190438B1 (en) | 2003-01-08 |
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